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参数资料
型号： 73S1210F-68IMR/F/P
厂商： Maxim Integrated Products
文件页数： 98/126页
文件大小： 0K
描述： IC SMART CARD READER PROG 68-QFN
产品培训模块： Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装： 2,500
系列： 73S12xx
核心处理器： 80515
芯体尺寸： 8-位
速度： 24MHz
连通性： I²C，智能卡，UART/USART
外围设备： LED，POR，WDT
输入/输出数： 8
程序存储器容量： 32KB（32K x 8）
程序存储器类型： 闪存
RAM 容量： 2K x 8
电压 - 电源 (Vcc/Vdd)： 2.7 V ~ 6.5 V
振荡器型： 内部
工作温度： -40°C ~ 85°C
封装/外壳： 68-VFQFN 裸露焊盘
包装： 带卷 (TR)
DS_1210F_001
73S1210F Data Sheet
Rev. 1.4
73
Figure 16: Asynchronous Activation Sequence Timing
VCC
IO
RST
CLK
t1
t2
t3
t4
t5
Firmware sets
VCCSEL to 00
CMDVCCnB
t5 delay or
Card Event
t1: Time after either a “card event” occurs or firmware sets the VCCSela and VCCSelb bits to 0
(see t5, VCCOff_tmr) occurs until RST is asserted low.
t2: Time after RST goes low until CLK stops.
t3: Time after CLK stops until IO goes low.
t4: Time after IO goes low until VCC is powered down.
t5: Delayed VCC off time (in ETUs per VCCOff_tmr bits). Only in effect due to firmware
deactivation.
Figure 17: Deactivation Sequence
1.7.15.3
Data Reception/Transmission
When a 12Mhz crystal is used, the smart card UART will generate a 3.69Mhz (default) clock to both
smart card interfaces. This will allow approximately 9600bps (1/ETU) communication during ATR (ISO
7816 default). As part of the PPS negotiation between the smart card and the reader, the firmware may
determine that the smart card parameters F & D may be changed. After this negotiation, the firmware
may change the ETU by writing to the SFR FDReg to adjust the ETU and CLK. The firmware may also
change the smart card clock frequency by writing to the SFR SCCLK (SCECLK for external interface).
Independent clock frequency control is provided to each smart card interface. Clock stop high or Clock
stop low is supported in asynchronous mode. Figure 18 shows the ETU and CLK control circuits. The
firmware determines when clock stop is supported by the smart card and when it is appropriate to go into
that mode (and when to come out of it). The smart card UART is clocked by the same clock that is
provided to the selected smart card. The transition between smart card clocks is handled in hardware to
eliminate any glitches for the UART during switchover. The external smart card clock is not affected
when switching the UART to communicate with the internal smart card.
相关PDF资料
PDF描述
73S1215F-68IMR/F/P IC SMART CARD READER PROG 68-QFN
73S1217F-68IMR/F/P IC SMART CARD READER PROG 68-QFN
73S1217F-68MR/F/PE IC SOC SMART CARD READER 68QFN
73S8010C-ILR/F IC SMART CARD INTERFACE 28-SOIC
73S8010R-ILR/F IC SMART CARD INTERFACE 28-SOIC
相关代理商/技术参数
参数描述
73S1210F-68M/F/PB 制造商:Maxim Integrated Products 功能描述:- Trays
73S1210F-68M/F/PG 功能描述:8位微控制器 -MCU RoHS:否 制造商:Silicon Labs 核心:8051 处理器系列:C8051F39x 数据总线宽度:8 bit 最大时钟频率:50 MHz 程序存储器大小:16 KB 数据 RAM 大小:1 KB 片上 ADC:Yes 工作电源电压:1.8 V to 3.6 V 工作温度范围:- 40 C to + 105 C 封装 / 箱体:QFN-20 安装风格:SMD/SMT
73S1210F-68M/F/PH 功能描述:8位微控制器 -MCU RoHS:否 制造商:Silicon Labs 核心:8051 处理器系列:C8051F39x 数据总线宽度:8 bit 最大时钟频率:50 MHz 程序存储器大小:16 KB 数据 RAM 大小:1 KB 片上 ADC:Yes 工作电源电压:1.8 V to 3.6 V 工作温度范围:- 40 C to + 105 C 封装 / 箱体:QFN-20 安装风格:SMD/SMT
73S1210F-68M/F/PJ 制造商:Maxim Integrated Products 功能描述:SCR+PPAD/SRL INTFC/PWR MGT-3.11CODE - Rail/Tube
73S1210F-68MR/F/PG 功能描述:8位微控制器 -MCU RoHS:否 制造商:Silicon Labs 核心:8051 处理器系列:C8051F39x 数据总线宽度:8 bit 最大时钟频率:50 MHz 程序存储器大小:16 KB 数据 RAM 大小:1 KB 片上 ADC:Yes 工作电源电压:1.8 V to 3.6 V 工作温度范围:- 40 C to + 105 C 封装 / 箱体:QFN-20 安装风格:SMD/SMT
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