参数资料
型号: 935051900602
厂商: NXP SEMICONDUCTORS
元件分类: 通信及网络
英文描述: SPECIALTY TELECOM CIRCUIT, PDSO8
封装: 3.90 MM, SOT-96-1, MS-012AA, PLASTIC, SO-8
文件页数: 11/15页
文件大小: 181K
代理商: 935051900602
Philips Semiconductors
Product specification
SA612A
Double-balanced mixer and oscillator
1997 Nov 07
5
Besides excellent low power performance well into VHF, the
SA612A is designed to be flexible. The input, output, and oscillator
ports can support a variety of configurations provided the designer
understands certain constraints, which will be explained here.
The RF inputs (Pins 1 and 2) are biased internally. They are
symmetrical. The equivalent AC input impedance is approximately
1.5k || 3pF through 50MHz. Pins 1 and 2 can be used
interchangeably, but they should not be DC biased externally. Figure
5 shows three typical input configurations.
The mixer outputs (Pins 4 and 5) are also internally biased. Each
output is connected to the internal positive supply by a 1.5k
resistor. This permits direct output termination yet allows for
balanced output as well. Figure 6 shows three single-ended output
configurations and a balanced output.
The oscillator is capable of sustaining oscillation beyond 200MHz in
crystal or tuned tank configurations. The upper limit of operation is
determined by tank “Q” and required drive levels. The higher the Q
of the tank or the smaller the required drive, the higher the
permissible oscillation frequency. If the required L.O. is beyond
oscillation limits, or the system calls for an external L.O., the
external signal can be injected at Pin 6 through a DC blocking
capacitor. External L.O. should be 200mVP-P minimum to 300mVP-P
maximum.
Figure 7 shows several proven oscillator circuits. Figure 7a is
appropriate for cordless phones/cellular radio. In this circuit a third
overtone parallel-mode crystal with approximately 5pF load
capacitance should be specified. Capacitor C3 and inductor L1 act
as a fundamental trap. In fundamental mode oscillation the trap is
omitted.
Figure 8 shows a Colpitts varacter tuned tank oscillator suitable for
synthesizer-controlled applications. It is important to buffer the
output of this circuit to assure that switching spikes from the first
counter or prescaler do not end up in the oscillator spectrum. The
dual-gate MOSFET provides optimum isolation with low current.
The FET offers good isolation, simplicity, and low current, while the
bipolar circuits provide the simple solution for non-critical
applications. The resistive divider in the emitter-follower circuit
should be chosen to provide the minimum input signal which will
assume correct system operation.
INPUT
612A
12
612A
12
612A
12
a. Single-Ended Tuned Input
b. Balanced Input (For Attenuation
of Second-Order Products)
c. Single-Ended Untuned Input
SR00103
Figure 5. Input Configuration
相关PDF资料
PDF描述
935065560112 SPECIALTY TELECOM CIRCUIT, PDIP8
935052330623 F/FAST SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, PDSO20
935052330602 F/FAST SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, PDSO20
06599151 "PIPE PVC 1/2"""
06599152 "PIPE PVC 3/4"""
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