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参数资料
| 型号： | AD2S83IPZ-REEL |
| 厂商： | Analog Devices Inc |
| 文件页数： | 13/19页 |
| 文件大小： | 0K |
| 描述： | IC CONV R/D MONO VAR RES 44PLCC |
| 标准包装： | 500 |
| 类型： | R/D 转换器 |
| 输入类型： | 并联 |
| 输出类型： | 数字 |
| 接口： | 并联 |
| 电流 - 电源： | 30mA |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 44-LCC（J 形引线） |
| 供应商设备封装： | 44-PLCC（16.59x16.59） |
| 包装： | 带卷 (TR) |
Parameter
Conditions
Min
Typ
Max
Unit
COMPLEMENT
Internally Pulled High via 100 k
to +VS. Logic LO to Activate;
No Connect for Normal Operation
DATA LOAD
Sense
Internally Pulled High via 100 k
150
300
ns
to +VS. Logic LO Allows
Data to be Loaded into the
Counters from the Data Lines
BUSY
6, 7
Sense
Logic HI When Position O/P Changing
Width
150
350
ns
Load
Use Additional Pull-Up (See Figure 2)
1
LSTTL
DIRECTION
6
Sense
Logic HI Counting Up
Logic LO Counting Down
Max Load
3
LSTTL
RIPPLE CLOCK
6
Sense
Logic HI
All 1s to All 0s
All 0s to All 1s
Width
Dependent on Input Velocity
300
ns
Reset
Before Next Busy
Load
3
LSTTL
DIGITAL INPUTS
Input High Voltage, VIH
INHIBIT, ENABLE
2.0
V
DB1–DB16, Byte Select
±V
S =
±11.4 V, V
L = 5.0 V
Input Low Voltage, VIL
INHIBIT, ENABLE
0.8
V
DB1–DB16, Byte Select
±V
S =
±12.6 V, V
L = 5.0 V
DIGITAL INPUTS
Input High Current, IIH
INHIBIT, ENABLE
100
A
DB1–DB16
±V
S =
±12.6 V, V
L = 5.5 V
Input Low Current, IIL
INHIBIT, ENABLE
100
A
DB1–DB16, Byte Select
±V
S =
±12.6 V, V
L = 5.5 V
DIGITAL INPUTS
Low Voltage, VIL
ENABLE = HI
1.0
V
SC1, SC2,
DATA LOAD
±V
S =
±12.0 V, V
L = 5.0 V
Low Current, IIL
ENABLE = HI
–400
A
SC1, SC2,
DATA LOAD
±V
S =
±12.0 V, V
L = 5.0 V
DIGITAL OUTPUTS
High Voltage, VOH
DB1–DB16
2.4
V
RIPPLE CLK, DIR
±V
S =
±12.0 V, V
L = 4.5 V
IOH = 100
A
Low Voltage, VOL
DB1–DB16
0.4
V
RIPPLE CLK, DIR
±V
S =
±12.0 V, V
L = 5.5 V
IOL = 1.2 mA
NOTES
1Angular accuracy is not guaranteed <50 Hz reference frequency.
2Linearity derates from 500 kHz–1000 kHz @ 0.0017%/kHz.
3Refer to Definition of Linearity, “The AD2S83 as a Silicon Tachogenerator.”
4Worst case reversion error at temperature extremes.
5Velocity output offset dependent on value for R6.
6Refer to timing diagram.
7Busy pulse guaranteed up to a VCO rate of 900 kHz.
All min and max specifications are guaranteed. Specifications in boldface are tested on all production units at final electrical test.
Specifications subject to change without notice.
AD2S83
–3–
REV. E
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