参数资料
型号: DS1110E-100+
厂商: Maxim Integrated Products
文件页数: 6/8页
文件大小: 0K
描述: IC DELAY LINE 10TAP 14-TSSOP
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 96
标片/步级数: 10
功能: 不可编程
延迟到第一抽头: 10ns
接头增量: 10ns
可用的总延迟: 100ns
独立延迟数: 1
电源电压: 4.75 V ~ 5.25 V
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 14-TSSOP(0.173",4.40mm 宽)
供应商设备封装: 14-TSSOP
包装: 管件
DS1110
Terminology
Period: The time elapsed between the leading edge of
the first pulse and the leading edge of the following pulse.
tWI (Pulse Width): The elapsed time on the pulse
between the 1.5V point on the leading edge and the
1.5V point on the trailing edge, or the 1.5V point on the
trailing edge and the 1.5V point on the leading edge.
tRISE (Input Rise Time): The elapsed time between the
20% and the 80% point on the leading edge of the
input pulse.
tFALL (Input Fall Time): The elapsed time between the
80% and the 20% point on the trailing edge of the
input pulse.
tPLH (Time Delay, Rising): The elapsed time between
the 1.5V point on the leading edge of the input pulse
and the 1.5V point on the leading edge of any tap out-
put pulse.
tPHL (Time Delay, Falling): The elapsed time between
the 1.5V point on the trailing edge of the input pulse
and the 1.5V point on the trailing edge of any tap out-
put pulse.
Test Setup Description
Figure 3 illustrates the hardware configuration used for
measuring the timing parameters on the DS1110. A
precision pulse generator under software control pro-
duces the input waveform. Time delays are measured
by a time interval counter (20ps resolution) connected
10-Tap Silicon Delay Line
6
______________________________________________________________________
PULSE
GENERATOR
TIME
INTERVAL
COUNTER
VHF SWITCH
CONTROL UNIT
STOP
DEVICE UNDER TEST
Z0 = 50
START
Figure 3. Test Circuit
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