参数资料
型号: LTC3209EUF-1#TRPBF
厂商: Linear Technology
文件页数: 7/20页
文件大小: 0K
描述: IC LED DRIVR QVGA DISPLAY 20-QFN
标准包装: 2,500
拓扑: 升压(升压),切换式电容器(充电泵)
输出数: 8
内部驱动器:
类型 - 主要: 背光
类型 - 次要: 白色 LED
频率: 850kHz
电源电压: 2.9 V ~ 4.5 V
安装类型: 表面贴装
封装/外壳: 20-WFQFN 裸露焊盘
供应商设备封装: 20-QFN 裸露焊盘(4x4)
包装: 带卷 (TR)
工作温度: -40°C ~ 85°C
LTC3209-1/LTC3209-2
PI FU CTIO S (LTC3209-1/LTC3209-2)
CPO (Pin 1/Pin 1): Output of the Charge Pump Used to
Power LEDs. A 2.2 μ F X5R or X7R ceramic capacitor
should be connected to ground.
MAIN1-6 (Pins 2, 3, 4, 5, 6, 7, LTC3209-1): Current
Source Outputs for the MAIN Display White LEDs. The
LEDs on the MAIN display can be set from 0mA to 28mA
in 256 steps via software control and internal 8-bit linear
DAC. Each output can be disabled externally by connecting
the output to CPO. Setting data in REGA to 0 disables all
MAIN outputs.
MAIN1-5 (Pins 2, 3, 4, 5, 6, LTC3209-2): Current Source
Outputs for the MAIN Display White LEDs. The LEDs on the
MAIN display can be set from 0mA to 28mA in 256 steps
via software control and internal 8-bit linear DAC. Each
output can be disabled externally by connecting the output
to CPO. Setting data in REGA to 0 disables all MAIN
outputs.
AUX (Pin 8/Pin 7): Current Source Output for the AUX
Display LED. The LED current source can be set from 0mA
to 13.75mA in 4 steps via software control and internal 2-
bit DAC. AUX does not have dropout sensing and cannot
be disabled by connecting to CPO. This pin can also be
used as an I 2 C controlled general purpose output.
V BAT2,1 (Pins 9, 18/Pins 8, 18): Supply Voltage for the Entire
Device. Two separate pins are used to isolate the charge
pump from the analog sections to reduce noise. Both pins
must be connected together externally and bypassed with
a single 2.2 μ F low ESR ceramic capacitor close to V BAT1 .
V BAT2 may require a 0.1 μ F capacitor.
R REF (Pin 10/Pin 9): This pin controls the maximum amount
of LED current for all displays. The R REF voltage is 1.23V.
An external 24.3k resistor to ground sets the reference
currents for all display DACs and support circuits for nomi-
nal MAIN full-scale current of 28mA and total CAM full-scale
current of 400mA. The value for R REF is limited to a range
of 20k to 30k.
DV CC (Pin 11/Pin 10): Supply Voltage for All Digital I/O
CAM1-2 (Pins 11, 12, LTC3209-2): Current Source
Outputs for the CAM1 and CAM2 Display White LEDs. The
LEDs on the two CAM displays can each be set from 0mA
to 200mA in 16 steps via software control and internal
4-bit linear DAC. Two 4-bit registers are available. One is
used to program the high camera current and the second
the low camera current. These registers can be selected
via the serial port or the CAMHL pin. Each output can be
disabled by connecting the output to CPO. Setting data in
REGB to 0 disables both CAM outputs. (See Applications
Information).
CAM (Pin 12, LTC3209-1): Current Source Output for the
CAM Display White LED. The LED on the CAM display can
be set from 0mA to 400mA in 16 steps via software control
and internal 4-bit linear DAC. Two 4-bit registers are
available. One is used to program the high camera current
and the second the low camera current. These registers
can be selected via the serial port or the CAMHL pin. Each
output can be disabled by connecting the output to CPO.
Setting data in REGB to 0 disables the CAM output. (See
Applications Information).
CAMHL (Pin 13/Pin 13): This pin selects CAM high current
register when asserted high and CAM low current register
when low. The high to low transition automatically resets
the charge pump mode to 1x.
SDA (Pin 14/Pin 14): I 2 C Data Input for the Serial Port.
Serial data is shifted in one bit per clock to control the
LTC3209-1/LTC3209-2. The logic level is referenced to
DV CC .
SCL (Pin 15/Pin 15): I 2 C Clock Input. The logic level for
SCL is referenced to DV CC .
C1P, C2P, C1M, C2M (Pins 20, 19, 17, 16/Pins 20, 19,
17, 16): Charge Pump Flying Capacitor Pins. A 2.2 μ F X7R
or X5R ceramic capacitor should be connected from C1P
to C1M and C2P to C2M.
Exposed Pad (Pin 21/Pin 21): System Ground. Connect
Exposed Pad to PCB ground plane.
Lines. This pin sets the logic reference level of the
LTC3209-1/LTC3209-2. Decouple DV CC to GND with a
0.1 μ F capacitor. A UVLO circuit on the DV CC pin forces all
registers to all 0s whenever DV CC is below the UVLO
threshold.
320912fa
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