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参数资料
| 型号： | IDT71342LA35PF8 |
| 厂商： | IDT, Integrated Device Technology Inc |
| 文件页数： | 2/14页 |
| 文件大小： | 0K |
| 描述： | IC SRAM 32KBIT 35NS 64TQFP |
| 标准包装： | 750 |
| 格式 - 存储器： | RAM |
| 存储器类型： | SRAM - 双端口，异步 |
| 存储容量： | 32K (4K x 8) |
| 速度： | 35ns |
| 接口： | 并联 |
| 电源电压： | 4.5 V ~ 5.5 V |
| 工作温度： | 0°C ~ 70°C |
| 封装/外壳： | 64-LQFP |
| 供应商设备封装： | 64-TQFP（14x14） |
| 包装： | 带卷 (TR) |
| 其它名称： | 71342LA35PF8 |
IDT71342SA/LA
High-Speed 4K x 8 Dual-Port Static RAM with Semaphore
Description
The IDT71342 is a high-speed 4K x 8 Dual-Port Static RAM with full
on-chip hardware support of semaphore signalling between the two
ports.
The IDT71342 provides two independent ports with separate
control, address, and I/O pins that permit independent, asynchronous
access for reads or writes to any location in memory. To assist in
arbitrating between ports, a fully independent semaphore logic block
is provided. This block contains unassigned flags which can be
accessed by either side; however, only one side can control the flag at any
Pin Configurations (1,2,3)
INDEX
Industrial and Commercial Temperature Ranges
time. An automatic power down feature, controlled by CE and SEM ,
permits the on-chip circuitry of each port to enter a very low standby power
mode (both CE and SEM HIGH).
Fabricated using CMOS high-performance technology, this device
typically operates on only 700mW of power. Low-power (LA) versions
offer battery backup data retention capability, with each port typically
consuming 200μW from a 2V battery. The device is packaged in either a
64-pin TQFP or a 52-pin PLCC.
A 1L
8
7 6 5
4 3
2
1
52 51 50 49 48 47
46
OE R
A 2L
A 3L
A 4L
9
10
11
45
44
43
A 0R
A 1R
A 2R
A 5L
A 6L
A 7L
A 8L
A 9L
I/O 0L
I/O 1L
I/O 2L
I/O 3L
12
13
14
15
16
17
18
19
20
IDT71342J
J52-1 (4)
52-Pin PLCC
Top View (5)
21 22 23 24 25 26 27 28 29 30 31 32 33
42
41
40
39
38
37
36
35
34
A 3R
A 4R
A 5R
A 6R
A 7R
A 8R
A 9R
N/C
I/O 7R
2721 drw 02
INDEX
OE L
A 0L
A 1L
A 2L
A 3L
1
2
3
4
5
48
47
46
45
44
OE R
A 0R
A 1R
A 2R
A 3R
A 4L
A 5L
A 6L
N/C
A 7L
A 8L
A 9L
N/C
I/O 0L
6
7
8
9
10
11
12
13
14
71342PF
PN64-1 (4)
64-Pin TQFP
Top View (5)
43
42
41
40
39
38
37
36
35
A 4R
A 5R
A 6R
N/C
A 7R
A 8R
A 9R
N/C
N/C
NOTES:
1. All Vcc pins must be connected to power supply.
2. All GND pins must be connected to ground supply.
I/O 1L
I/O 2L
15
16
34
33
I/O 7R
I/O 6R
3. J52 package body is approximately .79 in x .79 in x .17 in.
PN64 package body is approximately 14mm x 14mm x 1.4mm.
4. This package code is used to reference the package diagram.
5. This text does not indicate orientation of the actual part-marking.
6.42
2721 drw 03
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