参数资料
型号: ADS1252U/2K5G4
厂商: Texas Instruments
文件页数: 15/21页
文件大小: 0K
描述: IC ADC 24-BIT SER 41.7KHZ 8-SOIC
产品培训模块: Data Converter Basics
视频文件: Nuts and Bolts of the Delta-Sigma Converter
标准包装: 2,500
位数: 24
采样率(每秒): 41.7k
数据接口: 串行
转换器数目: 1
功率耗散(最大): 40mW
电压电源: 单电源
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 8-SOIC(0.154",3.90mm 宽)
供应商设备封装: 8-SOIC
包装: 带卷 (TR)
输入数目和类型: 1 个差分,双极
配用: 296-19906-ND - EVAL MOD FOR ADS1252
ADS1252
3
SBAS127D
www.ti.com
ELECTRICAL CHARACTERISTICS
All specifications at TMIN to TMAX, VDD = +5V, CLK = 16MHz, and VREF = 4.096V, unless otherwise specified.
ADS1252U
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
ANALOG INPUT
Full-Scale Input Voltage
0
±V
REF
V
Absolute Input Voltage
+VIN or –VIN to GND
–0.3
VDD
V
Differential Input Impedance
CLK = 3.84kHz
125
M
CLK = 1MHz
480
k
CLK = 16MHz
30
k
Input Capacitance
20
pF
Input Leakage
At +25
°C5
50
pA
At TMIN to TMAX
1nA
DYNAMIC CHARACTERISTICS
Data Rate
41.7
kHz
Bandwidth
–3dB
9
kHz
Serial Clock (SCLK)
16
MHz
System Clock Input (CLK)
16
MHz
ACCURACY
Integral Nonlinearity(1)
±0.0003
±0.0015
% of FSR
THD
1kHz Input; 0.1dB below FS
97
dB
Noise
2.5
3.8
ppm of FSR, rms
Resolution
24
Bits
No Missing Codes
24
Bits
Common-Mode Rejection(2)
at DC
90
100
dB
Gain Error
0.4
1
% of FSR
Offset Error
±100
±200
ppm of FSR
Gain Sensitivity to VREF
VREF = 4.096V ±0.1V
1:1
Power-Supply Rejection Ratio
60
80
dB
PERFORMANCE OVER TEMPERATURE
Offset Drift
0.07
ppm/
°C
Gain Drift
CLK = 16MHz
7.5
ppm/
°C
CLK = 14MHz
5.2
ppm/
°C
CLK = 12MHz
3.9
ppm/
°C
CLK < 10MHz
3.4
ppm/
°C
VOLTAGE REFERENCE
VREF
0.5
4.096
VDD
V
Load Current
220
A
DIGITAL INPUT/OUTPUT
Logic Family
CMOS
Logic Level: VIH
+4.0
+VDD + 0.3
V
VIL
–0.3
+0.8
V
VOH
IOH = –500A
+4.5
V
VOL
IOL = 500A
0.4
V
Input (SCLK, CLK) Hysteresis
0.6
V
Data Format
Offset Binary Two’s Complement
POWER-SUPPLY REQUIREMENTS
Operation
+4.75
+5
+5.25
V
Quiescent Current
VDD = +5VDC
8
10
mA
Operating Power
40
50
mW
Power-Down Current
110
A
TEMPERATURE RANGE
Operating
–40
+85
°C
Storage
–60
+100
°C
NOTES: (1) Applies to full-differential signals.
(2) The common-mode rejection test is performed with a 100mV differential input.
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