参数资料
型号: ADS62P42IRGCT
厂商: Texas Instruments
文件页数: 1/78页
文件大小: 0K
描述: IC ADC 14BIT DUAL 65MSPS 64-VQFN
产品培训模块: Data Converter Basics
标准包装: 1
位数: 14
采样率(每秒): 65M
数据接口: 串行,并联
转换器数目: 2
电压电源: 模拟和数字
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 64-VFQFN 裸露焊盘
供应商设备封装: 64-VQFN 裸露焊盘(9x9)
包装: 标准包装
输入数目和类型: 2 个差分,单极
其它名称: 296-23135-6
SLAS561C
– JULY 2007 – REVISED FEBRUARY 2012
DUAL CHANNEL, 14-BITS, 125/105/80/65 MSPS ADC WITH DDR LVDS/CMOS OUTPUTS
1
FEATURES
Medical Imaging
Radar Systems
Maximum Sample Rate: 125 MSPS
Test and Measurement Instrumentation
14-Bit Resolution with No Missing Codes
95 dB Crosstalk
DESCRIPTION
Parallel CMOS and DDR LVDS Output Options
ADS62P4X is a dual channel 14-bit A/D converter
3.5 dB Coarse Gain and Programmable Fine
family with maximum sample rates up to 125 MSPS.
Gain up to 6 dB for SNR/SFDR Trade-Off
It
combines
high
performance
and
low
power
consumption in a compact 64 QFN package. Using
Digital Processing Block with:
an internal sample and hold and low jitter clock
– Offset Correction
buffer, the ADC supports high SNR and high SFDR at
– Fine Gain Correction, in Steps of 0.05 dB
high input frequencies. It has coarse and fine gain
options
that
can
be
used
to
improve
SFDR
– Decimation by 2/4/8
performance at lower full-scale input ranges.
– Built-in and Custom Programmable 24-Tap
Low-/High-/Band-Pass Filters
ADS62P4X includes a digital processing block that
consists of several useful and commonly used digital
Supports Sine, LVPECL, LVDS and LVCMOS
functions such as ADC offset correction, fine gain
Clocks and Amplitude Down to 400 mVPP
correction (in steps of 0.05 dB), decimation by 2,4,8
Clock Duty Cycle Stabilizer
and in-built and custom programmable filters. By
Internal Reference; Supports External
default, the digital processing block is bypassed, and
Reference also
its functions are disabled.
64-QFN Package (9mm
× 9mm)
Two output interface options exist
– parallel CMOS
and DDR LVDS (Double Data Rate). ADS62P4X
Pin Compatible 12-Bit Family (ADS62P2X)
includes
internal
references
while
traditional
reference pins and associated decoupling capacitors
APPLICATIONS
have been eliminated. Nevertheless, the device can
Wireless Communications Infrastructure
also be driven with an external reference. The device
is specified over the industrial temperature range
Software Defined Radio
(
–40°C to 85°C).
Power Amplifier Linearization
802.16d/e
Table 1. ADS62P4X Performance Summary
ADS62P45
ADS62P44
ADS62P43
ADS62P42
Fin = 10 MHz (0 dB gain)
88
92
93
94
SFDR, dBc
Fin = 190 MHz (3.5 dB gain)
84
86
87
85
Fin = 10 MHz (0 dB gain)
73.7
74.2
74.6
74.7
SINAD, dBFS
Fin = 190 MHz (3.5 dB gain)
70.8
71
71.3
70.9
Analog Power, mW
799
710
594
515
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Copyright
2007–2012, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
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