参数资料
型号: DSPIC33FJ128GP710T-I/PF
厂商: Microchip Technology
文件页数: 28/90页
文件大小: 0K
描述: IC DSPIC MCU/DSP 128K 100TQFP
产品培训模块: Asynchronous Stimulus
标准包装: 1,000
系列: dsPIC™ 33F
核心处理器: dsPIC
芯体尺寸: 16-位
速度: 40 MIP
连通性: CAN,I²C,IrDA,LIN,SPI,UART/USART
外围设备: AC'97,欠压检测/复位,DMA,I²S,POR,PWM,WDT
输入/输出数: 85
程序存储器容量: 128KB(128K x 8)
程序存储器类型: 闪存
RAM 容量: 16K x 8
电压 - 电源 (Vcc/Vdd): 3 V ~ 3.6 V
数据转换器: A/D 32x10b/12b
振荡器型: 内部
工作温度: -40°C ~ 85°C
封装/外壳: 100-TQFP
包装: 带卷 (TR)
配用: DM300024-ND - KIT DEMO DSPICDEM 1.1
DV164033-ND - KIT START EXPLORER 16 MPLAB ICD2
MA330012-ND - MODULE DSPIC33 100P TO 84QFP
MA330011-ND - MODULE DSPIC33 100P TO 100QFP
DM240001-ND - BOARD DEMO PIC24/DSPIC33/PIC32
AC164323-ND - MODULE SKT FOR 100TQFP
dsPIC33F
DS70155C-page 32
Preliminary
2005 Microchip Technology Inc.
9.0
dsPIC33F INSTRUCTION SET
9.1
Introduction
The dsPIC33F instruction set provides a broad suite of
instructions which supports traditional microcontroller
applications, and a class of instructions which supports
math-intensive applications. Since almost all of the
functionality of the PICmicro MCU instruction set has
been maintained, this hybrid instruction set allows a
friendly DSP migration path for users already familiar
with the PICmicro microcontroller.
9.2
Instruction Set Overview
The dsPIC33F instruction set contains 84 instructions
which can be grouped into the ten functional categories
shown in Table 9-1. Table 9-2 defines the symbols
used in the instruction summary tables, Table 9-3
through Table 9-12. These tables define the syntax,
description,
storage
and
execution
requirements
for each instruction. Storage requirements are repre-
sented in 24-bit instruction words and execution
requirements are represented in instruction cycles.
Most instructions have several different addressing
modes and execution flows which require different
instruction variants. For instance, there are six unique
ADD
instructions and each instruction variant has its
own instruction encoding.
TABLE 9-1:
dsPIC33F INSTRUCTION
GROUPS
9.2.1
MULTI-CYCLE INSTRUCTIONS
As the instruction summary tables show, most
instructions execute in a single cycle with the following
exceptions:
Instructions DO, MOV.D, POP.D, PUSH.D,
TBLRDH, TBLRDL, TBLWTH
and TBLWTL
require 2 cycles to execute.
Instructions DIVF, DIV.S, DIV.U are single-
cycle instructions, which should be executed
18 consecutive times as the target REPEAT
instruction.
Instructions that change the program counter also
require 2 cycles to execute, with the extra cycle
executed as a NOP. Skip instructions, which skip
over a 2-word instruction, require 3 instruction
cycles to execute with 2 cycles executed as a
NOP
.
The RETFIE, RETLW and RETURN are special
cases of instructions that change the program
counter. These execute in 3 cycles unless an
exception is pending, and then they execute in
2 cycles.
9.2.2
MULTI-WORD INSTRUCTIONS
As the instruction summary tables show, almost all
instructions consume one instruction word (24 bits),
with the exception of the CALL, DO and GOTO
instructions, which are flow instructions listed in
Table 9-9. These instructions require two words of
memory because their opcodes embed large literal
operands.
Functional Group
Summary Table
Move Instructions
Math Instructions
Logic Instructions
Rotate/Shift Instructions
Bit Instructions
Compare/Skip Instructions
Program Flow Instructions
Shadow/Stack Instructions
Control Instructions
DSP Instructions
Note:
Instructions that access program memory
as data, using Program Space Visibility,
incur some cycle count overhead.
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