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参数资料
| 型号： | ADUC7129BSTZ126-RL |
| 厂商： | Analog Devices Inc |
| 文件页数： | 55/92页 |
| 文件大小： | 0K |
| 描述： | IC DAS MCU ARM7 ADC/DDS 80-LQFP |
| 产品培训模块： | ARM7 Applications & Tools Intro to ARM7 Core & Microconverters Process Control Direct Digital Synthesis Tutorial Series (1 of 7): Introduction |
| 标准包装： | 1 |
| 系列： | MicroConverter® ADuC7xxx |
| 核心处理器： | ARM7 |
| 芯体尺寸： | 16/32-位 |
| 速度： | 41.78MHz |
| 连通性： | EBI/EMI，I²C，SPI，UART/USART |
| 外围设备： | PLA，POR，PWM，PSM，温度传感器，WDT |
| 输入/输出数： | 38 |
| 程序存储器容量： | 126KB（63K x 16） |
| 程序存储器类型： | 闪存 |
| RAM 容量： | 8K x 8 |
| 电压 - 电源 (Vcc/Vdd)： | 3 V ~ 3.6 V |
| 数据转换器： | A/D 10x12b; D/A 1x10b |
| 振荡器型： | 内部 |
| 工作温度： | -40°C ~ 125°C |
| 封装/外壳： | 80-LQFP |
| 包装： | 标准包装 |
| 其它名称： | ADUC7129BSTZ126-RLDKR |
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ADuC7128/ADuC7129
Rev. 0 | Page 59 of 92
Table 80. COMxCON0 MMR Bit Designations
Bit
Value
Name
Description
7
DLAB
Divisor Latch Access.
Set by user to enable access to COMxDIV0 and COMxDIV1 registers.
Cleared by user to disable access to COMxDIV0 and COMxDIV1 and enable access to COMxRX and COMxTX.
6
BRK
Set Break.
Set by user to force SOUT to 0.
Cleared to operate in normal mode.
5
SP
Stick Parity.
Set by user to force parity to defined values.
1 if EPS = 1 and PEN = 1
0 if EPS = 0 and PEN = 1
4
EPS
Even Parity Select Bit.
Set for even parity.
Cleared for odd parity.
3
PEN
Parity Enable Bit.
Set by user to transmit and check the parity bit.
Cleared by user for no parity transmission or checking.
2
STOP
Stop Bit.
Set by user to transmit 1.5 stop bits if the word length is 5 bits or 2 stop bits if the word length is 6 bits, 7 bits, or
8 bits. The receiver checks the first stop bit only, regardless of the number of stop bits selected.
Cleared by user to generate 1 stop bit in the transmitted data.
1:0
WLS
Word Length Select.
00
5 bits.
01
6 bits.
10
7 bits.
11
8 bits.
Table 81. COMxSTA0 MMR Bit Designations
Bit
Name
Description
7
RSVD
Reserved.
6
TEMT
COMxTX Empty Status Bit.
Set automatically if COMxTX is empty.
Cleared automatically when writing to COMxTX.
5
THRE
COMxTX and COMxRX Empty.
Set automatically if COMxTX and COMxRX are empty.
Cleared automatically when one of the registers receives data.
4
BI
Break Error.
Set when SIN is held low for more than the maximum word length.
Cleared automatically.
3
FE
Framing Error.
Set when stop bit invalid.
Cleared automatically.
2
PE
Parity Error.
Set when a parity error occurs.
Cleared automatically.
1
OE
Overrun Error.
Set automatically if data is overwritten before it is read.
Cleared automatically.
0
DR
Data Ready.
Set automatically when COMxRX is full.
Cleared by reading COMxRX.
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