参数资料
型号: AOZ5007QI
厂商: Alpha & Omega Semiconductor Inc
文件页数: 9/16页
文件大小: 0K
描述: IC REG BUCK SYNC ADJ 50A 40QFN
标准包装: 3,000
类型: 降压(降压)
输出类型: 可调式
输出数: 1
输出电压: 4.5 V ~ 25 V
输入电压: 4.5 V ~ 25 V
频率 - 开关: 200kHz ~ 1.5MHz
电流 - 输出: 50A
同步整流器:
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 40-WFQFN 裸露焊盘
包装: 带卷 (TR)
供应商设备封装: 40-QFN(6x6)
AOZ5007
Timing Diagram
PWM Tri State Band
PWM
tPDLL
tPDLU
tTSSHD
tTSSHD
GH
GL
tPTS
tPTS
tPDHU
tPDHL
Figure 16. Timing Diagram
Application Information
AOZ5007QI and AOZ5007QI-01 are fully integrated
power modules designed to work over an input voltage
range of 4.5 V to 25 V with 5 V supplies for gate drive and
internal control circuits. A number of features are
provided making the AOZ5007QI a highly versatile power
module. High side and low side power MOSFETs are
combined in one package with the pin outs optimized for
power routing with minimum parasitic inductances. The
MOSFETs are individually tailored for efficient operation
as either high side or low side switches in a low duty
cycle synchronous buck converter. A high current driver
is also included in the package which minimizes the gate
drive loop and results in extremely fast switching. The
modules are fully compatible with Intel DrMOS
specification Rev 4.0 in form fit and function.
Powering the Module and the Gate Drives
An external supply VDRV of 5 V is required for driving the
MOSFETs. The MOSFETs are designed with low gate
thresholds so that lower drive voltage can be used to
reduce the switching and drive losses without
compromising the conduction losses. The control logic
supply VCIN can be derived from the gate drive supply
VDRV through an RC filter to bypass the switching noise.
See Figure 17 for recommended gate drive supply
connections. The gate driver is capable of supplying
several amperes of peak current into the LS FET to
achieve extremely fast switching. A ceramic bypass
capacitor of 1 ? F or higher is recommended from VDRV
to CGND.
The boost supply for driving the high side MOSFET is
generated by connecting a small capacitor between
BOOT pin and the switching node VSWH. It is
recommended that this capacitor Cboot be connected as
close as possible to the device across pins 4 and 7.
Boost diode is integrated into the package. Rboot is an
optional resistor used by designers to slow down the turn
on speed of the high side MOSFET. The value is a
compromise between the need to keep both the
switching time and VSWH node spikes as low as
possible and is typically 1 ? to 5 ??
Undervoltage Lockout and Enable
VCIN is monitored for UVLO conditions and both outputs
are actively held low unless adequate gate supply is
available. The undervoltage lockout is set at 3.5 V with a
550 mV hysteresis. Since the PWM control signals are
provided typically from an external controller or a digital
processor extra care must be taken during start up.
The AOZ5007QI must be powered up and enabled
before the PWM input is applied. It should be ensured
that PWM signal goes through a proper soft start
sequence to minimise inrush current in the converter
during start up. Powering the module with a full duty
cycle PWM signal already applied may lead to a number
of undesirable consequences as explained below.
Outputs can also be turned off through the DISB pin.
When this input is grounded the drivers are disabled and
held active low. The module is in standby mode with low
quiescent current of less than 75 ? A.
Rev. 1.1 October 2011
www.aosmd.com
Page 9 of 16
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