参数资料
型号: AT25010A-10TU-2.7
厂商: Atmel
文件页数: 1/22页
文件大小: 0K
描述: IC EEPROM 1KBIT 20MHZ 8TSSOP
标准包装: 100
格式 - 存储器: EEPROMs - 串行
存储器类型: EEPROM
存储容量: 1K (128 x 8)
速度: 10MHz,20MHz
接口: SPI 3 线串行
电源电压: 2.7 V ~ 5.5 V
工作温度: -40°C ~ 85°C
封装/外壳: 8-TSSOP(0.173",4.40mm 宽)
供应商设备封装: 8-TSSOP
包装: 管件
Features
? Serial Peripheral Interface (SPI) Compatible
? Supports SPI Modes 0 (0,0) and 3 (1,1)
– Data Sheet Describes Mode 0 Operation
? Low-voltage and Standard-voltage Operation
– 2.7 (V CC = 2.7V to 5.5V)
– 1.8 (V CC = 1.8V to 5.5V)
?
?
20 MHz Clock Rate (5V)
8-byte Page Mode
?
?
?
?
?
?
?
Block Write Protection
– Protect 1/4, 1/2, or Entire Array
Write Protect (WP) Pin and Write Disable Instructions for Both Hardware and Software
Data Protection
Self-timed Write Cycle (5 ms max)
High Reliability
– Endurance: One Million Write Cycles
– Data Retention: 100 Years
Automotive Devices Available
8-lead JEDEC PDIP, 8-lead JEDEC SOIC, 8-lead Ultra Thin mini-MAP (MLP 2x3) and 8-
lead TSSOP Packages
Die Sales: Wafer Form, Waffle Pack, Bumped Wafers
SPI Serial
EEPROM
1K (128x8)
2K (256x8)
4K (512x8)
Description
The AT25010A/020A/040A provides 1024/2048/4096 bits of serial electrically eras-
able programmable read-only memory (EEPROM) organized as 128/256/512 words of
8 bits each. The device is optimized for use in many industrial and commercial appli-
cations where low-power and low-voltage operation are essential. The
AT25010A/020A/040A is available in space saving 8-lead PDIP, 8-lead JEDEC SOIC,
8-lead Ultra Thin mini-MAP (MLP 2x3) , and 8-lead TSSOP packages.
The AT25010A/020A/040A is enabled through the Chip Select pin (CS) and accessed
via a three-wire interface consisting of Serial Data Input (SI), Serial Data Output (SO),
and Serial Clock (SCK). All programming cycles are completely self-timed, and no
separate erase cycle is required before write.
Block write protection is enabled by programming the status register with one of four
blocks of write protection. Separate Program Enable and Program disable instructions
are provided for additional data protection. Hardware data protection is provided via
the WP pin to protect against inadvertent write attempts. The HOLD pin may be used
to suspend any serial communication without resetting the serial sequence.
AT25010A
AT25020A
AT25040A
Not
Recommended
for New Design
Table 1. Pin Configuration
8-lead PDIP
8-lead SOIC
Pin Name
CS
SCK
Function
Chip Select
Serial Data Clock
CS
SO
WP
GND
1
2
3
4
8
7
6
5
VCC
HOLD
SCK
SI
C S
S O
W P
G N D
1
2
3
4
8
7
6
5
V
H
S
S
C C
O L
C K
I
SI
Serial Data Input
SO
Serial Data Output
8-lead Ultra Thin mini-MAP (MLP 2x3)
8-lead TSSOP
GND
VCC
WP
Ground
Power Supply
Write Protect
VCC
HOLD
SCK
SI
8
7
6
5
1
2
3
4
CS
SO
WP
GND
C S
S O
W P
G N D
1
2
3
4
8
7
6
5
V
H
S
S
C C
O L
C K
I
HOLD
Suspends Serial Input
Bottom view
3348J–SEEPR–8/06
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