参数资料
型号: AT32UC3L032-ZAUT
厂商: Atmel
文件页数: 157/174页
文件大小: 0K
描述: IC MCU 32K FLASH 16K 48-VQFN
产品培训模块: MCU Product Line Introduction
AVR® UC3 Introduction
标准包装: 2,080
系列: AVR®32 UC3 L
核心处理器: AVR
芯体尺寸: 32-位
速度: 50MHz
连通性: I²C,SPI,UART/USART
外围设备: 欠压检测/复位,DMA,POR,PWM,WDT
输入/输出数: 36
程序存储器容量: 32KB(32K x 8)
程序存储器类型: 闪存
RAM 容量: 16K x 8
电压 - 电源 (Vcc/Vdd): 1.62 V ~ 3.6 V
数据转换器: A/D 9x12b
振荡器型: 内部
工作温度: -40°C ~ 85°C
封装/外壳: 48-VFQFN 裸露焊盘
包装: 托盘
其它名称: 32UC3L032-ZAUT
32UC3L032-ZAUT-ND
83
32099I–01/2012
AT32UC3L016/32/64
The page buffer is not automatically reset after a page write. The programmer should do this
manually by issuing the Clear Page Buffer flash command. This can be done after a page write,
or before the page buffer is loaded with data to be stored to the flash page.
8.5
Flash Commands
The FLASHCDW offers a command set to manage programming of the flash memory, locking
and unlocking of regions, and full flash erasing. See Section 8.8.2 for a complete list of
commands.
To run a command, the CMD field in the Flash Command Register (FCMD) has to be written
with the command number. As soon as the FCMD register is written, the FRDY bit in the Flash
Status Register (FSR) is automatically cleared. Once the current command is complete, the
FSR.FRDY bit is automatically set. If an interrupt has been enabled by writing a one to
FCR.FRDY, the interrupt request line of the Flash Controller is activated. All flash commands
except for Quick Page Read (QPR) and Quick User Page Read (QPRUP) will generate an inter-
rupt request upon completion if FCR.FRDY is one.
Any HSB bus transfers attempting to read flash memory when the FLASHCDW is busy execut-
ing a flash command will be stalled, and allowed to continue when the flash command is
complete.
After a command has been written to FCMD, the programming algorithm should wait until the
command has been executed before attempting to read instructions or data from the flash or
writing to the page buffer, as the flash will be busy. The waiting can be performed either by poll-
ing the Flash Status Register (FSR) or by waiting for the flash ready interrupt. The command
written to FCMD is initiated on the first clock cycle where the HSB bus interface in FLASHCDW
is IDLE. The user must make sure that the access pattern to the FLASHCDW HSB interface
contains an IDLE cycle so that the command is allowed to start. Make sure that no bus masters
such as DMA controllers are performing endless burst transfers from the flash. Also, make sure
that the CPU does not perform endless burst transfers from flash. This is done by letting the
CPU enter sleep mode after writing to FCMD, or by polling FSR for command completion. This
polling will result in an access pattern with IDLE HSB cycles.
All the commands are protected by the same keyword, which has to be written in the eight high-
est bits of the FCMD register. Writing FCMD with data that does not contain the correct key
and/or with an invalid command has no effect on the flash memory; however, the PROGE bit is
set in the Flash Status Register (FSR). This bit is automatically cleared by a read access to the
FSR register.
Writing a command to FCMD while another command is being executed has no effect on the
flash memory; however, the PROGE bit is set in the Flash Status Register (FSR). This bit is
automatically cleared by a read access to the FSR register.
If the current command writes or erases a page in a locked region, or a page protected by the
BOOTPROT fuses, the command has no effect on the flash memory; however, the LOCKE bit is
set in the FSR register. This bit is automatically cleared by a read access to the FSR register.
8.5.1
Write/Erase Page Operation
Flash technology requires that an erase must be done before programming. The entire flash can
be erased by an Erase All command. Alternatively, pages can be individually erased by the
Erase Page command.
The User page can be written and erased using the mechanisms described in this chapter.
相关PDF资料
PDF描述
35650-51 BNC RES CAP/CHAIN 50 OHMS
ATMEGA644A-PU IC MCU AVR 64K FLASH 40PDIP
46650-51 BNC RES CAP 50 OHMS
ATTINY26L-8SU ID MCU AVR 2K 5V 8MHZ 20-SOIC
ATTINY26L-8MU ID MCU AVR 2K 5V 8MHZ 32-QFN
相关代理商/技术参数
参数描述
AT32UC3L064 制造商:ATMEL 制造商全称:ATMEL Corporation 功能描述:32-bit Atmel AVR Microcontroller
AT32UC3L064_1 制造商:ATMEL 制造商全称:ATMEL Corporation 功能描述:AVR32 32-bit Microcontroller
AT32UC3L064_10 制造商:ATMEL 制造商全称:ATMEL Corporation 功能描述:32-bit AVR??Microcontroller
AT32UC3L064_11 制造商:ATMEL 制造商全称:ATMEL Corporation 功能描述:32-bit Atmel AVR Microcontroller
AT32UC3L064-AUR 功能描述:32位微控制器 - MCU UC3L-64KB Flash 85C RoHS:否 制造商:Texas Instruments 核心:C28x 处理器系列:TMS320F28x 数据总线宽度:32 bit 最大时钟频率:90 MHz 程序存储器大小:64 KB 数据 RAM 大小:26 KB 片上 ADC:Yes 工作电源电压:2.97 V to 3.63 V 工作温度范围:- 40 C to + 105 C 封装 / 箱体:LQFP-80 安装风格:SMD/SMT