参数资料
| 型号： | ISL6323AIRZ-T |
| 厂商： | Intersil |
| 文件页数： | 12/36页 |
| 文件大小： | 0K |
| 描述： | IC PWM CTRLR SYNC BUCK DL 48QFN |
| 标准包装： | 4,000 |
| 应用： | 控制器，AMD SVI |
| 输入电压： | 5 V ~ 12 V |
| 输出数： | 2 |
| 输出电压： | 最高 2V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 48-VFQFN 裸露焊盘 |
| 供应商设备封装： | 48-QFN（7x7） |
| 包装： | 带卷 (TR) |
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ISL6323A
Timing Diagram
t PDHUGATE
t RUGATE
UGATE
LGATE
t FLGATE
Operation
The ISL6323A utilizes a multi-phase architecture to provide
a low cost, space saving power conversion solution for the
processor core voltage. The controller also implements a
t FUGATE
t RLGATE
t PDHLGATE
pulse is terminated 1/3 of a cycle after the PWM pulse of the
previous phase. The peak-to-peak current for each phase is
about 7A, and the DC components of the inductor currents
combine to feed the load.
simple single phase architecture to provide the Northbridge
voltage on the same chip.
IL1 + IL2 + IL3, 7A/DIV
Multi-phase Power Conversion
Microprocessor load current profiles have changed to the
point that the advantages of multi-phase power conversion
are impossible to ignore. The technical challenges
associated with producing a single-phase converter that is
both cost-effective and thermally viable have forced a
change to the cost-saving approach of multi-phase. The
ISL6323A controller helps simplify implementation by
integrating vital functions and requiring minimal external
provides a top level view of the multi-phase power
conversion using the ISL6323A controller.
Interleaving
The switching of each channel in a multi-phase converter is
timed to be symmetrically out of phase with each of the other
channels. In a 3-phase converter, each channel switches 1/3
IL3, 7A/DIV
PWM3, 5V/DIV
IL2, 7A/DIV
PWM2, 5V/DIV
IL1, 7A/DIV
PWM1, 5V/DIV
1 μ s/DIV
FIGURE 1. PWM AND INDUCTOR-CURRENT WAVEFORMS
FOR 3-PHASE CONVERTER
To understand the reduction of ripple current amplitude in the
multi-phase circuit, examine Equation 2, which represents
an individual channel peak-to-peak inductor current.
( V IN – V OUT ) V OUT
cycle after the previous channel and 1/3 cycle before the
following channel. As a result, the three-phase converter has
a combined ripple frequency three times greater than the
I PP = ------------------------------------------------------
L f S V IN
(EQ. 2)
ripple frequency of any one phase. In addition, the peak-to-
peak amplitude of the combined inductor currents is reduced
in proportion to the number of phases (Equations 2 and 3).
Increased ripple frequency and lower ripple amplitude mean
that the designer can use less per-channel inductance and
lower total output capacitance for any performance
specification.
Figure 1 illustrates the multiplicative effect on output ripple
frequency. The three channel currents (IL1, IL2, and IL3)
combine to form the AC ripple current and the DC load
current. The ripple component has three times the ripple
frequency of each individual channel current. Each PWM
12
In Equation 2, V IN and V OUT are the input and output
voltages respectively, L is the single-channel inductor value,
and f S is the switching frequency.
The output capacitors conduct the ripple component of the
inductor current. In the case of multi-phase converters, the
capacitor current is the sum of the ripple currents from each
of the individual channels. Compare Equation 2 to the
expression for the peak-to-peak current after the summation
of N symmetrically phase-shifted inductor currents in
Equation 3. Peak-to-peak ripple current decreases by an
amount proportional to the number of channels. Output-
voltage ripple is a function of capacitance, capacitor
equivalent series resistance (ESR), and inductor ripple
current. Reducing the inductor ripple current allows the
designer to use fewer or less costly output capacitors.
FN6878.1
May 12, 2010
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