参数资料
型号: ATT3042-50S132I
厂商: Electronic Theatre Controls, Inc.
元件分类: FPGA
英文描述: Field-Programmable Gate Arrays
中文描述: 现场可编程门阵列
文件页数: 40/80页
文件大小: 528K
代理商: ATT3042-50S132I
Data Sheet
February 1997
ATT3000 Series Field-Programmable Gate Arrays
40
Lucent Technologies Inc.
Pin Assignments
(continued)
Table 8. ATT3020, ATT3030, and ATT3042; 68-Pin PLCC and 84-Pin PLCC Pinout
*
Pin Numbers
Function
Pin Numbers
Function
68 PLCC
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
84 PLCC
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
68 PLCC 84 PLCC
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
PWRDWN
TCLKIN–I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
V
CC
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
M1–
RDATA
M0–RTRIG
M2–I/O
HDC–I/O
I/O
LDC
–I/O
I/O
I/O
I/O
I/O
I/O
INIT
–I/O
GND
I/O
I/O
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
I/O
I/O
I/O
I/O
I/O
I/O
I/O
XTL2–I/O
RESET
DONE–
PROG
D7–I/O
XTL1–BCLKIN–I/O
D6–I/O
I/O
D5–I/O
CS0
–I/O
D4–I/O
I/O
V
CC
D3–I/O
CS1
–I/O
D2–I/O
I/O
I/O
D1–I/O
RDY/
BUSY
RCLK
–I/O
D0–DIN–I/O
DOUT–I/O
CCLK
A0–
WS
–I/O
A1–CS2–I/O
A2–I/O
A3–I/O
I/O
* Unprogrammed IOBs have a default pull-up; this prevents an undefined pad level for unbonded or unused IOBs. Programmed outputs are
default slew-limited.
Indicates unconnected package pins for the ATT3020.
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ATT3042-50S44I Field-Programmable Gate Arrays
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ATT3042-50T132I 制造商:未知厂家 制造商全称:未知厂家 功能描述:Field-Programmable Gate Arrays
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