参数资料
型号: CS7620
厂商: Cirrus Logic, Inc.
英文描述: CCD IMAGER ANALOG PROCESSOR
中文描述: CCD成像器模拟处理器
文件页数: 1/70页
文件大小: 1032K
代理商: CS7620
Preliminary Product Information
This document contains information for a new product.
Cirrus Logic reserves the right to modify this product without notice.
1
Copyright
Cirrus Logic, Inc. 1999
(All Rights Reserved)
P.O. Box 17847, Austin, Texas 78760
(512) 445 7222 FAX: (512) 445 7581
http://www.cirrus.com
CS7620
CCD Imager Analog Processor
Features
l
13-Bit A/D Conversion Using DRX
Technology
l
Backlight Compensation
l
Supports three Input Ranges of 0.53V,
1.07V, and 1.60V
l
Multi-Sync CCD Timing Generator
l
High Resolution Output Mode
l
Low Resolution (Preview) Output Mode for
LCD Driver
l
Integrated Correlated Double Sampler
l
Digital Black Level Clamp
l
Digital Outputs Selectable for 13, 12, or 10 Bits
l
Two Integrated General Purpose DACs
l
Low Power Consumption
l
Power Down Mode
l
High Speed Serial Interface
l
Supports a Large Variety of Clock Input
Frequencies
l
Low power mode option
Description
The CS7620 is a low-power analog front-end processor
for interline or frame transfer CCD imagers. Main appli-
cations include digital still image cameras with up to
8k×8k pixels.
The architecture includes a correlated double sampler,
black level clamp and a 13-bit A/D conversion module
using patented DRX technology. In addition, the chip
contains a timing generator, which supports common
CCDs from IBM, and Polaroid. For CCDs using different
timing signals, the internal timing generator can be
bypassed.
There are 2 general purpose DACs available which can
be used to drive motors for iris and shutter control.
Chip parameters can be programmed using a high
speed 4-wire asynchronous digital interface.
The chip outputs digitized CCD data in either 13-bit, 12-
bit or 10-bit format. 10-bit outputs are generated from the
13-bit A/D output by a programmable companding curve.
ORDERING INFORMATION
CS7620-IQ
10x10x1.4mm
-40 to +85 °C
64-pin TQFP
CCD OUTPUT
MASTER
CLOCK
CDS/DRX
GAIN
DATA OUT
PLL
OUTPUT
COMPANDER
REGISTER
BLOCK
SERIAL
INTERFACE
A/D
CONVERTER
BLACK
LEVEL
TIMING
GENERATOR
CCD TIMING SIGNALS
CLOCK OUT
CLOCK
SERIAL BUS
DAC
2 DACS
OUTPUTS
JUL ‘99
DS301PP2
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