参数资料
型号: DS1248P
英文描述: 1024k NV SRAM with Phantom Clock
中文描述: 1024k NV SRAM,带有隐含时钟
文件页数: 6/21页
文件大小: 285K
代理商: DS1248P
DS1248/DS1248P
6 of 21
PHANTOM CLOCK REGISTER DEFINITION
Figure 2
AM/PM/12/24 MODE
Bit 7 of the hours register is defined as the 12-hour or 24-hour mode-select bit. When high, the 12-hour
mode is selected. In the 12-hour mode, bit 5 is the AM/PM bit with logic high being PM. In the 24-hour
mode, bit 5 is the second 10-hour bit (20–23 hours).
OSCILLATOR AND RESET BITS
Bits 4 and 5 of the day register are used to control the
RESET
and oscillator functions. Bit 4 controls the
RESET
(pin 1). When the
RESET
bit is set to logic 1, the
RESET
input pin is ignored. When the
RESET
bit is set to logic 0, a low input on the
RESET
pin will cause the phantom clock to abort data transfer
without changing data in the watch registers. Bit 5 controls the oscillator. When set to logic 1, the
oscillator is off. When set to logic 0, the oscillator turns on and the watch becomes operational. These bits
are shipped from the factory set to a logic 1.
ZERO BITS
Registers 1, 2, 3, 4, 5, and 6 contain one or more bits which will always read logic 0. When writing these
locations, either a logic 1 or 0 is acceptable.
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