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| 型号： | EVAL-AD5292EBZ |
| 厂商： | Analog Devices Inc |
| 文件页数： | 15/32页 |
| 文件大小： | 0K |
| 描述： | BOARD EVAL FOR AD5292 |
| 标准包装： | 1 |
| 主要目的： | 数字电位器 |
| 嵌入式： | 是 |
| 已用 IC / 零件： | AD5292 |
| 主要属性： | 1 通道，1024 位置 |
| 次要属性： | SPI 接口 |
| 已供物品： | 板，CD |
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AD5291/AD5292
Rev. D | Page 22 of 32
THEORY OF OPERATION
The AD5291 and AD5292 digital potentiometers are designed to
operate as true variable resistors for analog signals that remain
within the terminal voltage range of VSS < VTERM < VDD. The
patented ±1% resistor tolerance feature helps to minimize the total
RDAC resistance error, which reduces the overall system error
by offering better absolute matching and improved open-loop
performance. The digital potentiometer wiper position is
determined by the RDAC register contents. The RDAC register
acts as a scratchpad register, allowing as many value changes as
necessary to place the potentiometer wiper in the correct
position. The RDAC register can be programmed with any
position setting using the standard SPI interface by loading the
16-bit data-word. Once a desirable position is found, this value
can be stored in a 20-TP memory register. Thereafter, the wiper
position is always restored to that position for subsequent power-
up. The storing of 20-TP data takes approximately 6 ms; during
this time, the shift register is locked, preventing any changes from
taking place. The RDY pin identifies the completion of this 20-
TP storage.
SERIAL DATA INTERFACE
The AD5291 and AD5292 contain a serial interface (SYNC,
SCLK, DIN and SDO) that is compatible with SPI interface
standards, as well as most DSPs. The part allows writing of data
via the serial interface to every register.
SHIFT REGISTER
The AD5291 and AD5292 shift register is 16 bits wide (see
Figure 2). The 16-bit input word consists of two unused bits
(set to 0), followed by four control bits, and 10 RDAC data bits.
For the AD5291, the lower two RDAC data bits are don’t cares if
the RDAC register is read from or written to. Data is loaded MSB
first (Bit DB15). The four control bits determine the function of
diagram of a typical AD5291 and AD5292 write sequence.
The write sequence begins by bringing the SYNC line low. The
SYNC pin must be held low until the complete data-word is
loaded from the DIN pin. When SYNC returns high, the serial
data-word is decoded according to the commands in
.
The command bits (Cx) control the operation of the digital
potentiometer. The data bits (Dx) are the values that are loaded
into the decoded register. The AD5291 and AD5292 have an
internal counter that counts a multiple of 16 bits (a frame) for
proper operation. For example, AD5291 and AD5292 work with
a 32-bit word but does not work properly with a 31-bit or 33-bit
word. The AD5291 and AD5292 do not require a continuous
SCLK, when
SYNC is high, and all serial interface pins should
be operated at close to the VLOGIC supply rails to minimize
power consumption in the digital input buffers.
RDAC REGISTER
The RDAC register directly controls the position of the digital
potentiometer wiper. For example, when the RDAC register is
loaded with all zeros, the wiper is connected to Terminal B of
the variable resistor. The RDAC register is a standard logic register;
there is no restriction on the number of changes allowed.
Table 11. Command Operation Truth Table
Command Bits [DB13:DB10]
Data Bits [DB9:DB0]1
Command
C3
C2
C1
C0
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
Operation
0
X
NOP command: do nothing.
1
0
1
D9
D8
D7
D6
D5
D4
D3
D2
D12
D02
Write contents of serial data to RDAC.
2
0
1
0
X
Read RDAC wiper setting from the SDO
output in the next frame.
3
0
1
X
Store wiper setting: store RDAC setting
to 20-TP memory.
4
0
1
0
X
Reset: refresh RDAC with 20-TP stored
value.
5
0
1
0
1
X
D4
D3
D2
D1
D0
Read contents of 20-TP memory, or
status of 20-TP memory, from the SDO
output in the next frame.
6
0
1
0
X
D3
D2
D1
D0
Write contents of serial data to control
register.
7
0
1
X
Read control register from the SDO
output in the next frame.
8
1
0
X
D0
Software shutdown.
D0 = 0 (normal mode).
D0 = 1 (device placed in shutdown mode).
1 X = don’t care.
2 In the AD5291, this bit is a don’t care.
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