28
March 17, 1995
RGB524
IBM
Index Control
RS[2:0]:
111
Access:
Read/Write
Power on Value: Undened
Bits 7 - 1
Reserved
Bit 0
INDX CNTL - Index Control. Con-
trols auto-increment of the index reg-
ister.
0
Off - no auto-increment.
1
On - the index register (Index
High and Index Low) will incre-
ment by one following a write or
read to Indexed Data.
10.2
Indexed Registers
The indexed registers are accessed by setting the
desired address into the internal index register (Index
High and Index Low) and writing or reading the
Indexed Data register.
0
1
2
3
4
5
6
7
INDX
CNTL
Reserved
10.2.1
Miscellaneous Control
Miscellaneous Control 1
Index:
0x0070
Access:
Read/Write
Power on Value: 0x00
Bit 7
MISR CNTL
0
Off. If the MISR is running, it
will stop at the beginning of the
next frame.
1
On. The MISR will start accu-
mulating a signature at the
start of the next frame (end of
vertical blanking).
Bit 6
VMSK CNTL - VRAM Mask Control
0
No VRAM masking.
1
The VRAM inputs on the
PIX[63:00] inputs will be
masked under control of the
VRAM Mask High and VRAM
Mask Low registers.
This bit has no effect when the VGA
port is selected.
Bit 5
PADR RFMT - Palette Address Reg-
ister (Read Mode) Format. Species
the contents returned from the Pal-
ette Address register, read mode
(RS[2:0] = 011)
0
Return the eight bits of the read
address
1
Return the palette access state
in the two low order bits
Bit 4
SENS DSAB -SENSE Driver Disable
0
SENSE driver enabled
1
SENSE driver disabled (3-
stated)
Bit 3
SENS SEL - Sense Select. Selects
which bit of the DAC Sense register
is presented on the SENSE driver.
0
Bit 3 - Unlatched Sense
1
Bit 7 - Latched Sense
Bits 2 - 1
Reserved
Bit 0
VRAM SIZE - VRAM interface width
0
32 bits. PIX[31:0] used,
PIX[63:32] ignored.
1
64 bits. PIX[63:00] used.
(This bit has no effect when the VGA port is selected.)
0
1
2
3
4
5
6
7
Reserved
MISR
CNTL CNTL RFMT
VMSK PADR SENS
DSAB
SENS
SEL
VRAM
SIZE