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参数资料
| 型号： | IDT74ALVCH162260PA8 |
| 厂商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分类： | 编、解码器及复用、解复用 |
| 英文描述： | ALVC/VCX/A SERIES, 12 MULTIPLEXER AND DEMUX/DECODER, PDSO56 |
| 封装： | 0.50 MM PITCH, TSSOP-56 |
| 文件页数： | 3/8页 |
| 文件大小： | 77K |
| 代理商： | IDT74ALVCH162260PA8 |
INDUSTRIALTEMPERATURERANGE
IDT74ALVCH162260
3.3V CMOS 12-BIT TO 24-BIT MULTIPLEXED D-TYPE LATCH
3
NOTE:
1. These pins have "Bus-Hold". All other pins are standard inputs, outputs, or I/Os.
NOTES:
1. H = HIGH Voltage Level
L = LOW Voltage Level
X = Don’t Care
Z = High Impedance
2. Output level before the indicated steady-state input conditions were established.
Inputs
Outputs
Ax
LEA1B
LEA2B
OE1B
OE2B
1Bx
2Bx
HH
H
L
H
LH
H
L
H
LLL
H
2B
0
(2)
L
H
LLL
L
2B
0
(2)
HL
H
L
1B
0
(2)
H
LL
HLL
1B
0
(2)
L
X
L
LLL
1B
0
(2)
2B
0
(2)
XX
X
H
Z
X
L
H
Active
Z
X
H
L
Z
Active
X
L
Active
A-TO-B (
OEA = H)
FUNCTION TABLES (CONTINUED)(1)
Pin Names
I/O
Description
A x
I/O
Bidirectional Data Port A. Usually connected to the CPU's address/data bus.
(1)
1Bx
I/O
Bidirectional Data Port 1B. Usually connected to the even path or even bank of memory.
(1)
2Bx
I/O
Bidirectional Data Port 2B. Usually connected to the odd path or odd bank of memory.
(1)
LEA1B
I
Latch Enable Input for A-1B Latch. The latch is open when LEA1B is HIGH. Data from the A-port is latched on the HIGH to LOW
transition of LEA1B.
LEA2B
I
Latch Enable Input for A-2B Latch. The latch is open when LEA2B is HIGH. Data from the A-port is latched on the HIGH to LOW
transition of LEA2B.
LE1B
I
Latch Enable Input for 1B-A Latch. The latch is open when LE1B is HIGH. Data from the A-port is latched on the HIGH to LOW
transition of LE1B.
LE2B
I
Latch Enable Input for 2B-A Latch. The latch is open when LE2B is HIGH. Data from the A-port is latched on the HIGH to LOW
transition of LE2B.
SEL
I
1B or 2B Port Selection. When HIGH, SEL enables data transfer from 1B Port to A Port. When LOW, SEL enables data transfer from
2B Port to A Port.
OEA
I
Output Enable for A Port (Active LOW)
OE1B
I
Output Enable for 1B Port (Active LOW)
OE2B
I
Output Enable for 2B Port (Active LOW)
PIN DESCRIPTION
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