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| 型号： | IDT74ALVCHR16825PA |
| 厂商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分类： | 总线收发器 |
| 英文描述： | ALVC/VCX/A SERIES, DUAL 9-BIT DRIVER, TRUE OUTPUT, PDSO56 |
| 封装： | 0.50 MM PITCH, TSSOP-56 |
| 文件页数： | 1/6页 |
| 文件大小： | 99K |
| 代理商： | IDT74ALVCHR16825PA |
1
EXTENDED COMMERCIAL TEMPERATURE RANGE
IDT74ALVCHR16825
3.3V CMOS 18-BIT BUFFER/DRIVER W/3-STATE OUTPUTS
AUGUST 1999
1999 Integrated Device Technology, Inc.
DSC-4525/-
c
IDT74ALVCHR16825
EXTENDED COMMERCIAL TEMPERATURE RANGE
FUNCTIONAL BLOCK DIAGRAM
3.3V CMOS 18-BIT
BUFFER/DRIVER WITH
3-STATE OUTPUTS AND
BUS-HOLD
FEATURES:
–
0.5 MICRON CMOS Technology
–
Typical tSK(0) (Output Skew) < 250ps
–
ESD > 2000V per MIL-STD-883, Method 3015;
> 200V using machine model (C = 200pF, R = 0)
–
0.635mm pitch SSOP, 0.50mm pitch TSSOP,
and 0.40mm pitch TVSOP packages
–
Extended commercial range of – 40°C to + 85°C
–VCC = 3.3V ± 0.3V, Normal Range
–VCC = 2.7V to 3.6V, Extended Range
–VCC = 2.5V ± 0.2V
–
CMOS power levels (0.4 W typ. static)
–
Rail-to-Rail output swing for increased noise margin
APPLICATIONS:
3.3V High Speed Systems
3.3V and lower voltage computing systems
DESCRIPTION:
This 18-bit buffer/driver is built using advanced dual metal CMOS
technology. The ALVCHR16825 improves the performance and den-
sity of 3-state memory address drivers, clockdrivers, and bus-oriented
receivers and transmitters. The device can be used as two 9-bit buffers
or one 18-bit buffer, and provides true data.
The 3-state control gate is a 2-input AND gate with active-low inputs
so that if either output-enable (OE1 or OE2) input is high, all nine affected
outputs are in the high-impedance state.
To ensure the high-impedance state during power up or power down,
OE should be tied to VCC through a pullup resistor, the minimum value
of the resistor is determined by the current-sinking capability of the
driver.
The ALVCHR16825 has series resistors in the device output structure
which will significantly reduce line noise when used with light loads. This
driver has been designed to drive ±12mA at the designated threshold
levels.
The ALVCHR16825 has “bus-hold” which retains the inputs’ last state
whenever the input bus goes to a high impedance. This prevents floating
inputs and eliminates the need for pull-up/down resistors.
Drive Features for ALVCHR16825:
–
Balanced Output Drivers: ±12mA
–
Low switching noise
1
A 1
1
OE1
1
OE2
TO EIG H T OT HER C H ANNE LS
1
56
55
1
Y 1
2
A1
2
OE1
2
OE2
TO EIG H T OT HER C H ANNE LS
41
29
28
2
Y 1
16
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