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参数资料
| 型号： | IDT82V3002APV |
| 厂商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分类： | 通信及网络 |
| 英文描述： | WAN PLL WITH DUAL REFERENCE INPUTS |
| 中文描述： | SPECIALTY TELECOM CIRCUIT, PDSO56 |
| 封装： | SSOP-56 |
| 文件页数： | 1/28页 |
| 文件大小： | 390K |
| 代理商： | IDT82V3002APV |
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The IDT logo is a registered trademark of Integrated Device Technology, Inc.
INDUSTRIAL TEMPERATURE RANGE
2003 Integrated Device Technology, Inc.
OCTOBER 22, 2003
DSC-6243/2
WAN PLL WITH DUAL
REFERENCE INPUTS
IDT82V3002A
DESCRIPTION
The IDT82V3002A is a WAN PLL with dual reference inputs. It
contains a Digital Phase-Locked Loop (DPLL), which generates ST-BUS
clocks and framing signals that are phase locked to a 2.048 MHz, 1.544
MHz or 8 kHz input reference.
The IDT82V3002A provides eight types of clock signals (C1.5o,
C3o
,
C6o, C2o,
C4o
, C8o,
C16o
,
C32o
) and six types of framing signals (
F0o
,
F8o,
F16o
,
F32o
, RSP, TSP) for the multitrunk T1 and E1 primary rate
transmission links.
The IDT82V3002A is compliant with AT&T TR62411, Telcordia GR-
1244-CORE Stratum 3, Stratum 4 Enhanced and Stratum 4, ETSI ETS
300 011, ITU-T G.813 Option 1 for 2048 kbit/s interface, and ITU-T G.812
FEATURES
Supports AT&T TR62411 and Telcordia GR-1244-CORE Stra-
tum
3, Stratum 4 Enhanced and Stratum 4 timing for DS1
interfaces
Supports ITU-T G.813 Option 1 clocks for 2048 kbit/s inter-
faces
Supports ITU-T G.812 Type IV clocks for 1544 kbit/s interface
and 2048 kbit/s interfaces
Supports ETSI ETS 300 011, TBR 4, TBR 12 and TBR 13 tim-
ing
for E1 interface
Selectable input reference signal: 8 kHz, 1.544 MHz or 2.048
MHz
Accepts reference inputs from two independent sources
Provides eight types of clock signals: C1.5o,
C3o
, C2o,
C4o
,
C6o, C8o,
C16o
and
C32o
Provides six types of 8 kHz framing pulses:
F0o
, F8o,
F16o
,
F32o
,
RSP and TSP
Holdover frequency accuracy of 0.025 ppm
Phase slope of 5 ns/125 μs
Attenuates wander from 2.1 Hz
Fast Lock mode
Provides Time Interval Error (TIE) correction
MTIE of 600 ns
JTAG boundary scan
Holdover status indication
Freerun status indication
Normal status indication
Lock status indication
Input primary reference quality indication
3.3 V operation with 5 V tolerant I/O
Package available: 56-pin SSOP
Type IV clocks for 1544 kbit/s interface and 2048 kbit/s interface. It meets
the jitter/wander tolerance, jitter/wander transfer, intrinsic jitter/wander,
frequency accuracy, capture range, phase change slope, holdover
frequency accuracy and MTIE (Maximum Time Interval Error)
requirements for these specifications.
The IDT82V3002A can be used in synchronization and timing control
for T1 and E1 systems, or used as ST-BUS clock and frame pulse
sources. It can also be used in access switch, access routers, ATM edge
switches, wireless base station controllers, or IADs (Integrated Access
Devices), PBXs and line cards.
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|---|---|
| IDT82V3010 | T1/E1/OC3 TELECOM CLOCK GENERATOR WITH DUAL REFERENCE INPUTS |
| IDT82V3010PV | T1/E1/OC3 TELECOM CLOCK GENERATOR WITH DUAL REFERENCE INPUTS |
| IDT82V3010PVG | T1/E1/OC3 TELECOM CLOCK GENERATOR WITH DUAL REFERENCE INPUTS |
| IDT82V3255 | WAN PLL |
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相关代理商/技术参数 |
参数描述 |
|---|---|
| IDT82V3002APVG | 功能描述:IC PLL WAN T1/E1 DUAL REF 56SSOP RoHS:是 类别:集成电路 (IC) >> 时钟/计时 - 专用 系列:- 标准包装:1,500 系列:- 类型:时钟缓冲器/驱动器 PLL:是 主要目的:- 输入:- 输出:- 电路数:- 比率 - 输入:输出:- 差分 - 输入:输出:- 频率 - 最大:- 电源电压:3.3V 工作温度:0°C ~ 70°C 安装类型:表面贴装 封装/外壳:28-SSOP（0.209"，5.30mm 宽） 供应商设备封装:28-SSOP 包装:带卷 (TR) 其它名称:93786AFT |
| IDT82V3002APVG8 | 功能描述:IC PLL WAN T1/E1 DUAL REF 56SSOP RoHS:是 类别:集成电路 (IC) >> 时钟/计时 - 专用 系列:- 标准包装:1,500 系列:- 类型:时钟缓冲器/驱动器 PLL:是 主要目的:- 输入:- 输出:- 电路数:- 比率 - 输入:输出:- 差分 - 输入:输出:- 频率 - 最大:- 电源电压:3.3V 工作温度:0°C ~ 70°C 安装类型:表面贴装 封装/外壳:28-SSOP（0.209"，5.30mm 宽） 供应商设备封装:28-SSOP 包装:带卷 (TR) 其它名称:93786AFT |
| IDT82V3010 | 制造商:IDT 制造商全称:Integrated Device Technology 功能描述:T1/E1/OC3 TELECOM CLOCK GENERATOR WITH DUAL REFERENCE INPUTS |
| IDT82V3010PV | 制造商:IDT 制造商全称:Integrated Device Technology 功能描述:T1/E1/OC3 TELECOM CLOCK GENERATOR WITH DUAL REFERENCE INPUTS |
| IDT82V3010PVG | 功能描述:IC PLL WAN 51/E1/OC3 DUAL 56SSOP RoHS:是 类别:集成电路 (IC) >> 时钟/计时 - 专用 系列:- 标准包装:1,500 系列:- 类型:时钟缓冲器/驱动器 PLL:是 主要目的:- 输入:- 输出:- 电路数:- 比率 - 输入:输出:- 差分 - 输入:输出:- 频率 - 最大:- 电源电压:3.3V 工作温度:0°C ~ 70°C 安装类型:表面贴装 封装/外壳:28-SSOP（0.209"，5.30mm 宽） 供应商设备封装:28-SSOP 包装:带卷 (TR) 其它名称:93786AFT |
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