参数资料
型号: ICS1562BM-201-4LFT
厂商: IDT, Integrated Device Technology Inc
文件页数: 1/20页
文件大小: 0K
描述: IC VIDEO CLK SYNTHESIZER 16-SOIC
标准包装: 2,500
类型: 时钟/频率合成器,时钟发生器,扇出配送
PLL:
输入: CMOS,TTL,晶体
输出: CMOS,PECL
电路数: 1
比率 - 输入:输出: 1:3
差分 - 输入:输出: 无/是
频率 - 最大: 260MHz
除法器/乘法器: 是/是
电源电压: 4.75 V ~ 5.25 V
工作温度: 0°C ~ 70°C
安装类型: 表面贴装
封装/外壳: 16-SOIC(0.154",3.90mm 宽)
供应商设备封装: 16-SOIC
包装: 带卷 (TR)
其它名称: 1562BM-201-4LFT
16-Pin SOIC
Integrated
Circuit
Systems, Inc.
ICS1562B
Description
The ICS1562B is a very high performance monolithic phase-
locked loop (PLL) frequency synthesizer. Utilizing ICS’s ad-
vanced CMOS mixed-mode technology, the ICS1562B
provides a low cost solution for high-end video clock genera-
tion.
The ICS1562B has differential video clock outputs (CLK+ and
CLK-) that are compatible with industry standard video DAC.
Another clock output, LOAD, is provided whose frequency is
derived from the main clock by a programmable divider. An
additional clock output is available, LD/N2, which is derived
from the LOAD frequency and whose modulus may also be
programmed.
Operating frequencies are fully programmable with direct con-
trol provided for reference divider, prescaler, feedback divider
and post-scaler.
Reset of the pipeline delay on Brooktree RAMDAC
s may
be performed under register control. Outputs may also be set
to desired states to facilitate circuit board testing.
User Programmable Differential Output Graphics Clock Generator
Features
Two programming options:
ICS1562B-001 (Parallel Programming)
ICS1562B-201 (Serial Programming)
Supports high-resolution graphics - CLK output to
260 MHz, with 400 MHz options available
Eliminates need for multiple ECL output crystal oscillators
Fully programmable synthesizer capability - not just a
clock multiplier
Circuitry included for reset of Brooktree RAMDAC pipe-
line delay
VRAM shift clock generation capability
(-201 option only)
External feedback loop capability (-201 option only)
Compact - 16-pin 0.150” skinny SOIC package
Fully backward compatible to ICS1562
CRYSTAL
OSCILLATOR
/ R
PHASE-
FREQUENCY
DETECTOR
CHARGE
PUMP
LOOP
FILTER
VCO
PRESCALER
/ A
/ M
MUX
/ 2
/ 4
/ N1
MUX
DRIVER
DIFF.
OUTPUT
DRIVER
/ N2
PROGRAMMING
INTERFACE
CLK+
CLK
LOAD
LD/N2
XTAL1
XTAL2
ICS1562B - 001 Pinout
ICS1562B - 201 Pinout
Simplified Block Diagram - ICS1562B
FEEDBACK DIVIDER
EXTFBK
BLANK
(-201 only)
Figure 1
1562 B Rev B 10/07/04
RAMDAC is a trademark of Brooktree Corporation.
AD0
1
16
AD1
XTAL1
2
15
AD2
XTAL2
3
14
AD3
STROBE
4
13
VDD
VSS
5
12
VDDO
VSS
6
11
IPRG
LOAD
7
10
CLK+
LD/N2
8
9
CLK-
16-Pin SOIC
EXTFBK
1
16
DATA
XTAL1
2
15
HOLD
XTAL2
3
14
BLANK
DATCLK
4
13
VDD
VSS
5
12
VDDO
VSS
6
11
IPRG
LOAD
7
10
CLK+
LD/N2
8
9
CLK-
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