参数资料
型号: ISPLSI 1032EA-170LT100
厂商: Lattice Semiconductor Corporation
文件页数: 5/16页
文件大小: 0K
描述: IC PLD ISP 64I/O 5NS 100TQFP
标准包装: 90
系列: ispLSI® 1000EA
可编程类型: 系统内可编程
最大延迟时间 tpd(1): 5.0ns
电压电源 - 内部: 4.75 V ~ 5.25 V
逻辑元件/逻辑块数目: 32
门数: 6000
输入/输出数: 64
工作温度: 0°C ~ 70°C
安装类型: 表面贴装
封装/外壳: 100-LQFP
供应商设备封装: 100-TQFP(14x14)
包装: 托盘
其它名称: ISPLSI1032EA-170LT100
13
Specifications ispLSI 1032EA
USE
ispMA
CH
4A5
FOR
NEW
5V
DESIGNS
Maximum GRP Delay vs GLB Loads
GLB Load
ispLSI 1032EA-200
ispLSI 1032EA-170
ispLSI 1032EA-125
ispLSI 1032EA-100
3
4
1
8
16
32
GRP
Delay
(ns)
4
2
GRP/GLB/1032EA
1
Power Consumption
Power consumption in the ispLSI 1032EA device de-
pends on two primary factors: the speed at which the
device is operating, and the number of product terms
used. Figure 4 shows the relationship between power
and operating speed.
0127/1032EA
Icc can be estimated for the ispLSI 1032EA using the following equation:
Icc = 20mA + (# of PTs * .52) + (# of nets * Max Freq * .003)
Where:
# of PTs = Number of Product Terms used in design
# of nets = Number of Signals used in device
Max freq = Highest Clock Frequency to the device (in MHz)
The Icc estimate is based on typical conditions (Vcc = 5.0V, room temperature) and an assumption of four GLB
loads on average exists. These values are for estimates only. Since the value of Icc is sensitive to operating
conditions and the program in the device, the actual Icc should be verified.
fmax (MHz)
Notes: Configuration of eight 16-bit counters
Typical current at 5V, 25°C
160
140
120
100
200
0
50
100
150
200
250
I CC
(mA)
220
ispLSI 1032EA
180
240
260
Figure 4. Typical Device Power Consumption vs fmax
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ISPLSI103L-80LJ 制造商:LATT 功能描述:
ISPLSI1048-50LG/883 制造商:未知厂家 制造商全称:未知厂家 功能描述:Electrically-Erasable Complex PLD