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参数资料
| 型号： | JDLHLATN18.432 |
| 厂商： | VECTRON INTERNATIONAL |
| 元件分类： | XO, clock |
| 英文描述： | VCXO, CLOCK, 18.432 MHz, CMOS/TTL OUTPUT |
| 封装： | ROHS COMPLIANT, HERMETIC SEALED, J-LEADE, CERAMIC, SOJ-6 |
| 文件页数： | 6/10页 |
| 文件大小： | 200K |
| 代理商： | JDLHLATN18.432 |
J-Type Voltage Controlled Crystal Oscillator
Vectron International 267 Lowell Rd. Hudson, NH 03051
Tel:1-88-VECTRON-1
e-mail vectron@vectron.com
5
J
H
G
F
E
D
C
B
A
L
K
I
Bottom Holes for TRU
and VCO Products Only
Figure 6. Tape Reel Drawing for CMOS and PECL output option
Table 5. Tape and Reel Dimensions (mm)
Tape Dimensions
Reel Dimensions
# Per
Product
A
B
C
D
E
F
G
H
I
J
K
L
Reel
J-Type
24
11.5
1.5
4
12
1.78
21
13
100
5
25
330
200
Table 6. Ordering Information for the CMOS output version (add frequency)
Package
Supply
Voltage
(V)
VCXO
Type
APR
(ppm)
Operating
Temp.
(
°C )
Output/ Duty
Cycle
Min/Max
Tri-State
Specials
J
6 pin
Ceramic
SOJ
C
5V
±10%
U
VCXO
G
±50
C
0/70
A
TTL/
CMOS
45/55%
1
T
Tri State
on pin 2
N
Standard
D 3.3
±10%
L
±10%
linear
VCXO
N
±80
L
-40/ 85
J
CMOS
45/55%
2
H
±100
K
CMOS
40/60%
3
1.
Output is CMOS and symmetry is tested at TTL and CMOS thresholds.
2.
Output is CMOS and symmetry is tested at CMOS threshold. This option is used for 3.3 V operation.
3.
Output is CMOS and symmetry is tested at CMOS thresholds. This option is required for 3.3V, frequencies
>51.840MHz.
4.
Note: Not all combinations are possible.
Example: JDUGCKTN 77.76 = 3.3 volt, VCXO@77.760,
±50 ppm APR, 0/70°C,
40/60% Symmetry, CMOS, Tri-State on pin 2.
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