Lattice Semiconductor
ispMACH 4000V/B/C/Z Family Data Sheet
98
For Further Information
In addition to this data sheet, the following technical notes may be helpful when designing with the ispMACH
4000V/B/C/Z family:
ispMACH 4000 Timing Model Design and Usage Guidelines (TN1004)
ispMACH 4000V/B/C/Z Power Consumption (TN1005)
Revision History
ispMACH 4000V (3.3V) Lead-Free Extended Temperature Devices
Device
Part Number
Macrocells
Voltage
tPD
Package
Pin/Ball
Count
I/O
Grade
LC4032V
LC4032V-75TN48E
32
3.3
7.5
Lead-free TQFP
48
32
E
LC4032V-75TN44E
32
3.3
7.5
Lead-free TQFP
44
30
E
LC4064V
LC4064V-75TN100E
64
3.3
7.5
Lead-free TQFP
100
64
E
LC4064V-75TN48E
64
3.3
7.5
Lead-free TQFP
48
32
E
LC4064V-75TN44E
64
3.3
7.5
Lead-free TQFP
44
30
E
LC4128V
LC4128V-75TN144E
128
3.3
7.5
Lead-free TQFP
144
96
E
LC4128V-75TN128E
128
3.3
7.5
Lead-free TQFP
128
92
E
LC4128V-75TN100E
128
3.3
7.5
Lead-free TQFP
100
64
E
LC4256V
LC4256V-75TN176E
256
3.3
7.5
Lead-free TQFP
176
128
E
LC4256V-75TN144E
256
3.3
7.5
Lead-free TQFP
144
96
E
LC4256V-75TN100E
256
3.3
7.5
Lead-free TQFP
100
64
E
Date
Version
Change Summary
—
Previous Lattice releases.
July 2003
17z
Changed device status for LC4064ZC and LC4128ZC to production release and updated/added
AC and DC parameters as well as ordering part numbers for LC4064ZC and LC4128ZC devices.
Improved leakage current specications for ispMACH 4000Z. For ispMACH 4000V/B/C IIL, IIH
condition now includes 0V and 3.6V end points (0 ≤ VIN ≤ 3.6V).
Added 132-ball chip scale BGA power supply and NC connections.
Added 132-ball chip scale BGA logic signal connections for LC4064ZC, LC4128ZC and
LC4256ZC devices.
Added lead-free package designators.
October 2003
18z
Hot socketing characteristics footnote 1. has been enhanced; Insensitive to sequence of VCC or
VCCO. However, assumes monotonic rise/fall rates for Vcc and Vcco, provided (VIN - VCCO) ≤
3.6V.
Improved LC4064ZC tS to 2.5ns, tST to 2.7ns and fMAX (Ext.) to 175MHz, LC4128ZC tCO to
3.5ns and fMAX (Ext.) to 161MHz (version v.2.1).
Improved associated internal timing numbers and timing adders (version v.2.1).
Added ispMACH 4000V/B/C/Z ORP Reference Tables.
Enhanced ORP information in device pinout tables consistent with the ORP Combinations for I/O
Blocks tables (table 6, 7, 8 and 9 in page 9-11).
Corrected GLB/MC/Pad information in the 256-fpBGA pinouts for the LC4256V/B/C 160-I/O ver-
sion.
Added the ispMACH 4000 Family Speed Grade Offering table.
Added the ispMACH 4128ZC Industrial and Automotive Device OPNs
December 2003
19z
Added the ispMACH 4032ZC and 4064ZC Industrial and Automotive Device OPNs
January 2004
20z
ispMACH 4000Z data sheet status changed from preliminary to nal. Documents production
release of the ispMACH 4256Z device.