Attenuation Control
Both the left and right channels provide digital attenuation control in the signal path prior to conversion to analog by the
A/D converter. While the default attenuation is 0 dB, the level can be controlled over the range 0 dB to 127.5 dB in 0.5
dB steps with the 8-bit attenuation control register. The attenuation control registers have a dual structure so that after the
left and right channel attenuation values are set in the corresponding registers, the left and right outputs can be set to the
modified values with the same timing. Attenuation values set in advance can be reflected in the output by controlling the
UPDATE bit in each of these registers. See table 8 for details.
Notes:
1. The UPDATE bits are not latched internally. As a result, when the UPDATEL (or UPDATER) bit is 0, the set
attenuation value is transferred to the internal register, but is not reflected in the D/A converter output. However, when
UPDATEL (or UPDATER) is set to 1, either the internal register value or the value written to LAT (or RAT)[7:0]
when the UPDATE bit was set is reflected in the output starting with the next input sample after the UPDATE bit was
set.
2. Changing the attenuation value rapidly or over a large level can result in “zipper” noise appearing in the output.
Therefore, care is required when changing the attenuation value.
Output Attenuation
The left and right channel attenuation is controlled using the values set in the LAT and RAT registers. Table 9 shows the
correspondence between the attenuation setting value and the actual attenuation level.
No. 7236-21/31
LC708728V
Register address
Bits
Symbol
Default
Description
0000
[7:0]
LAT [7:0]
11111111 (0 dB)
D/A converter left channel attenuation data
D/A converter left
In 0.5 dB steps
channel attenuation
8
UPDATEL
0
Attenuation data load control
control
0: The value of LAT[7:0] is transferred to an internal register. (The output does not
change)
1: The left channel attenuation value is changed to that of the internal register, and
the left and right channel attenuation values are both changed. (The output value
changes.)
0001
[7:0]
RAT [7:0]
11111111 (0 dB)
D/A converter right channel attenuation data
D/A converter right
In 0.5 dB steps
channel attenuation
8
UPDATER
0
Attenuation data load control
control
0: The value of RAT[7:0] is transferred to an internal register. (The output does not
change.)
1: The right channel attenuation value is changed to that of the internal register, and
the left and right channel attenuation values are both changed. (The output value
changes.)
Table 8 Attenuation Control Register Map
XAT [7:0]
Attenuation level
00 (hex)
–∞ dB (mute)
01 (hex)
–127.5 dB
::
FE (hex)
–0.5 dB
FF (hex)
0 dB
Table 9 Attenuation Control Levels