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参数资料
| 型号： | LIS33DETR |
| 厂商： | STMICROELECTRONICS |
| 元件分类： | 模拟信号调理 |
| 英文描述： | SPECIALTY ANALOG CIRCUIT, PBGA16 |
| 封装： | 3 X 3 MM, 1 MM HEIGHT, GREEN, PLASTIC, LGA-16 |
| 文件页数： | 30/31页 |
| 文件大小： | 532K |
| 代理商： | LIS33DETR |
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Mechanical and electrical specifications
LIS33DE
8/31
Doc ID 15596 Rev 1
2
Mechanical and electrical specifications
2.1
Mechanical characteristics
T = 25°C unless otherwise noted
Table 3.
Mechanical characteristics @ Vdd=2.5V (1)
Symbol
Parameter
Test conditions
Min.
Typ.(2)
Max.
Unit
FS
Measurement range
FS bit set to 0(3)
±2.0
±2.3
g
FS bit set to 1
±9.2
Dres
Device resolution
FS bit set to 0
72
mg
So
Sensitivity
FS bit set to 0
15
18
21
mg/digit
FS bit set to 1
61
72
83
TCSO
Sensitivity change vs
temperature
FS bit set to 0
±0.01
%/°C
TyOff
Typical zero-g level offset
accuracy(4)
FS bit set to 0
±60
mg
FS bit set to 1
±80
mg
TCOff
Zero-g level change vs
temperature
Max delta from 25°C
±0.5
mg/°C
Vst
Self test output
change(5),(6),(7)
FS bit set to 0
STP bit used
X axis
-3
-19
-32
LSb
FS bit set to 0
STP bit used
Y axis
319
32
LSb
FS bit set to 0
STP bit used
Z axis
-3
-19
-32
LSb
BW
System bandwidth(8)
ODR/2
Hz
Top
Operating temperature range
-40
+85
°C
Wh
Product weight
20
mgram
1.
The product is factory calibrated at 2.5 V. The device can be used from 2.16 V to 3.6 V.
2.
Typical specifications are not guaranteed.
3.
Verified by wafer level test and measurement of initial offset and sensitivity.
4.
Typical zero-g level offset value after MSL3 preconditioning.
5.
If STM bit is used, values change in sign for all axes.
6.
Self Test output changes with the power supply. “Self Test Output Change” is defined as OUTPUT[LSb](Self-test bit on ctrl_reg1=1)
-OUTPUT[LSb](Self-test bit on ctrl_reg1=0). 1LSb=4.6g/256 at 8bit representation, ±2.3g full-scale.
7.
Output data reach 99% of final value after 3/ODR when enabling self-test mode due to device filtering.
8.
ODR is Output Data Rate. Refer to
Table 4 for specifications.
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