参数资料
型号: LT1737IS#TRPBF
厂商: Linear Technology
文件页数: 25/28页
文件大小: 0K
描述: IC REG CTRLR FLYBK ISO CM 16SOIC
标准包装: 2,500
PWM 型: 电流模式
输出数: 1
频率 - 最大: 125kHz
占空比: 90%
电源电压: 4.1 V ~ 20 V
降压:
升压:
回扫:
反相:
倍增器:
除法器:
Cuk:
隔离:
工作温度: -40°C ~ 125°C
封装/外壳: 16-SOIC(0.154",3.90mm 宽)
包装: 带卷 (TR)
LT1737
TYPICAL APPLICATIO S
therefore requires a physically larger transformer. The larg-
est size VERSA-PAC is used, a VP5-0083. Three windings
are paralleled for both the primary and secondary.
Overall power supply efficiency and output regulation ver-
sus load current at the nominal V IN = 5V may be seen in
Figures 16 and 17.
90
80
70
60
50
40
30
20
NONISOLATED APPLICATION
While the LT1737 was designed to serve isolated flyback
applications, it is useful to note that it is also capable of
supporting nonisolated applications. These are performed
by providing a continuous pseudo-DC feedback signal to
the FB pin. (The part behaves as if the flyback waveform
is infinitely long.) Figure 18 demonstrates just such a
system.
A SEPIC topology is shown whereby a 8V to 16V input is
converted to a nonisolated 12V output. A conventional
resistive feedback divider, R3/R4 drives the FB pin. (Ca-
pacitor C7 serves to filter out high frequency ripple in the
output voltage.) A combination of an R/C network (R11/
C5) in parallel with a single capacitor (C9) on the V C node
provides the required loop compensation. The load com-
pensation function is unwanted, so the R OCMP pin is left
open and the R CMPC pin is grounded. An LT1121 low
dropout regulator is programmed to a nominal 8.25V
0.01
0.1
I LOAD (A)
1
10
1737 F16
output by the R12/R13 resistor divider, and this allows the
LT1737 to drive M1, a logic level MOSFET. Minimum on
5.25
5.00
Figure 16. Efficiency vs I LOAD
time programming resistor R5 is set to 33k to minimize the
required output preload. Minimum enable time has no
direct effect on steady state operation, but programming
resistor R7 has been set to 100k for rapid start-up. Enable
delay resistor is similarly set to 24k.
Overall power supply efficiency versus input voltage and
load current may be seen in Figure 19. Because this
application example utilizes a nonisolated topology, load
regulation is not an issue. It is typically 0.2% (25mV) from
no load to full load.
Other nonisolated switching topologies may be similarly
implemented. For example, Boost and NonIsolated Fly-
4.75
0
1
2
I LOAD (A)
3
4
1737 F17
back readily suggest themselves. (A Nonisolated Flyback
topology also can be used to generate a negative output
voltage. In this case, the feedback is a dynamic waveform
derived from the primary side of the transformer, similar
Figure 17. Load Regulation
to an isolated LT1737 application.)
1737fa
25
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