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参数资料
型号： M30600M8-XXXGP
元件分类： 微控制器/微处理器
英文描述： 16-BIT, MROM, MICROCONTROLLER, PQFP100
封装： 14 X 14 MM, 0.50 MM PITCH, PLASTIC, LQFP-100
文件页数： 110/139页
文件大小： 1782K
代理商： M30600M8-XXXGP
Mitsubishi microcomputers
M16C / 60 Group
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
72
Serial I/O
Serial I/O is configured as two channels: UART0 and UART1. UART0 and UART1 each have an exclusive
timer to generate a transfer clock, so they operate independently of each other.
Figure 1.57 shows a block diagram of UART0 and UART1. Figure 1.58 shows a block diagram of the
transmit/receive unit.
UARTi (i = 0, 1) has two operation modes: a clock synchronous serial I/O mode and a clock asynchronous
serial I/O mode (UART mode). The contents of the serial I/O mode select bits (bits 0 to 2 at addresses
03A016 and 03A816) determine whether UARTi is used as a clock synchronous serial I/O or as a UART.
Although a few functions are different, UART0 and UART1 have almost the same functions. Figure 1.59
through 61 show configuration of UARTi-related registers.
Serial I/O
m: Values set to UART0 bit rate generator (BRG0)
n : Values set to UART1 bit rate generator (BRG1)
RxD0
1 / (m+1)
1/16
1/2
Bit rate generator
(address 03A116)
Clock synchronous type
(when internal clock is selected)
UART reception
Clock synchronous type
UART transmission
Clock synchronous type
(when internal clock is
selected)
Clock synchronous type
(when external clock is
selected)
Receive
clock
Transmit
clock
CLK0
Clock source selection
CTS0 / RTS0
f1
f8
f32
Internal
External
Vcc
RTS0
CTS0
TxD0
Transmit/
receive
unit
RxD1
1 / (n+1)
1/16
1/2
Bit rate generator
(address 03A916)
Clock synchronous type
(when internal clock is selected)
UART reception
Clock synchronous type
UART transmission
Clock synchronous type
(when internal clock is
selected)
Clock synchronous type
(when external clock is selected)
Receive
clock
Transmit
clock
CLK1
Clock source selection
f1
f8
f32
Internal
External
RTS1
CTS1
TxD1
(UART1)
(UART0)
Polarity
reversing
circuit
Polarity
reversing
circuit
CTS/RTS disabled
CTS/RTS separated
Clock output pin
select switch
CTS1 / RTS1
CTS0/ CLKS1
CTS/RTS disabled
CTS0 from UART1
CTS/RTS selected
CTS/RTS disabled
VCC
CTS0 to UART0
CTS0
CTS/RTS disabled
CTS/RTS separated
Reception
control circuit
Transmission
control circuit
Reception
control circuit
Transmission
control circuit
Transmit/
receive
unit
Figure 1.57. Block diagram of UARTi (i = 0, 1)
相关PDF资料
PDF描述
M30610MCA-XXXGP 16-BIT, MROM, 10 MHz, MICROCONTROLLER, PQFP100
M30610ECFS 16-BIT, UVPROM, 10 MHz, MICROCONTROLLER, CQCC100
M30612M4A-XXXGP 16-BIT, MROM, 10 MHz, MICROCONTROLLER, PQFP100
M30610ECGP 16-BIT, OTPROM, 10 MHz, MICROCONTROLLER, PQFP100
M30612MAA-XXXGP 16-BIT, MROM, 10 MHz, MICROCONTROLLER, PQFP100
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