参数资料
型号: M38002SFP
元件分类: 微控制器/微处理器
英文描述: 8-BIT, 8 MHz, MICROCONTROLLER, PQFP64
封装: 14 X 14 MM, 0.80 MM PITCH, PLASTIC, QFP-64
文件页数: 119/174页
文件大小: 1752K
代理商: M38002SFP
1-34
HARDWARE
3800 GROUP USER’S MANUAL
FUNCTIONAL DESCRIPTION SUPPLEMENT
Timing After Interrupt
The interrupt processing routine begins with the machine cycle fol-
lowing the completion of the instruction that is currently in execu-
tion.
Figure 32 shows a timing chart after an interrupt occurs, and Fig-
ure 33 shows the time up to execution of the interrupt processing
routine.
Fig. 32 Timing chart after an interrupt occurs
Fig. 33 Time up to execution of the interrupt processing routine
: CPU operation code fetch cycle
: Vector address of each interrupt
: Jump destination address of each interrupt
: “0016” or “0116
SYNC
BL, BH
AL, AH
SPS
φ
Data bus
Not used
PCH
PCL
PS
AL
AH
Address bus
S, SPS
S-2, SPS
S-1, SPS
PC
BL
BH
AL, AH
SYNC
RD
WR
Interrupt processing routine
Generation of interrupt request
Main routine
7 to 23 cycles
(At performing 8.0 MHz, 1.75
s to 5.75 s)
2 cycles
5 cycles
Start of interrupt processing
0 to 16 cycles
Waiting time for
post-processing
of pipeline
Stack push and
Vector fetch
T : at execution of DIV instruction (16 cycles)
T
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