- 您现在的位置：买卖IC网 > PDF目录180223 > M5-256/68-15VC (LATTICE SEMICONDUCTOR CORP) Fifth Generation MACH Architecture PDF资料下载
参数资料
| 型号： | M5-256/68-15VC |
| 厂商： | LATTICE SEMICONDUCTOR CORP |
| 元件分类： | PLD |
| 英文描述： | Fifth Generation MACH Architecture |
| 中文描述： | EE PLD, 15 ns, PQFP100 |
| 封装： | TQFP-100 |
| 文件页数： | 4/42页 |
| 文件大小： | 938K |
| 代理商： | M5-256/68-15VC |
第1页第2页第3页当前第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页第33页第34页第35页第36页第37页第38页第39页第40页第41页第42页
12
MACH 5 Family
initialization values, the VCC rise must be monotonic and the clock must be inactive until the reset
delay time has elapsed.
SECURITY BIT
A programmable security bit is provided on the MACH 5 devices as a deterrent to unauthorized
copying of the array conguration patterns. Once programmed, this bit defeats readback of the
programmed pattern by a device programmer, securing proprietary designs from competitors.
Programming and verication are also defeated by the security bit. The bit can only be reset by
erasing the entire device.
相关PDF资料 |
PDF描述 |
|---|---|
| M5-256/68-15VI | Fifth Generation MACH Architecture |
| M5-256/68-20VI | Fifth Generation MACH Architecture |
| M5-256/68-5VC | Fifth Generation MACH Architecture |
| M5-384/160-10YC | Fifth Generation MACH Architecture |
| M5-384/160-10YI | Fifth Generation MACH Architecture |
相关代理商/技术参数 |
参数描述 |
|---|---|
| M5262-I | 制造商:Leviton Manufacturing Co 功能描述: |
| M5262-IG | 制造商:Leviton Manufacturing Co 功能描述: |
| M5262-IGE | 制造商:Leviton Manufacturing Co 功能描述: |
| M5265P | 制造商:MITSUBISHI 制造商全称:Mitsubishi Electric Semiconductor 功能描述:LOW SATURATION OUTPUT TYPE CURRENT DRIVER |
| M5266P | 制造商:Panasonic Industrial Company 功能描述:IC |
发布紧急采购，3分钟左右您将得到回复。