参数资料
型号: MAX6870ETJ+
厂商: Maxim Integrated Products
文件页数: 14/51页
文件大小: 0K
描述: IC SEQUENCE/SUPERVISOR 32TQFN
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 43
类型: 序列发生器
监视电压数目: 6
输出: 开路漏极,推挽式
复位: 高有效/低有效
复位超时: 可调节/可选择
电压 - 阀值: 8 种可选阀值组合
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 32-WQFN 裸露焊盘
供应商设备封装: 32-TQFN-EP(7x7)
包装: 管件
EEPROM-Programmable Hex/Quad
Power-Supply Sequencers/Supervisors with ADC
Table 1. Programmable Features (continued)
FEATURE
General-Purpose Logic ?
Active high or active low logic levels
DESCRIPTION
Inputs (GPI1 – GPI4)
Watchdog Timers
Auxiliary Inputs
(AUXIN1, AUXIN2)
Manual Reset Input
( MR )
Margining Input
( MARGIN )
Reference Input
(REFIN)
10-Bit ADC*
Write Disable
Configuration Lock
?
?
?
?
?
?
?
?
?
?
?
?
?
?
?
?
?
?
?
?
?
?
Configure GPI_ as inputs to watchdog timers or programmable output stages
Clear dependent on any combination of one GPI_ input and one programmable output, a GPI_ input
only, or a programmable output only
Initial watchdog timeout period of 6.25ms, 25ms, 100ms, 400ms, 1.6s, 6.4s, 25.6s, or 102.4s
Normal watchdog timeout period of 6.25ms, 25ms, 100ms, 400ms, 1.6s, 6.4s, 25.6s, or 102.4s
Watchdog enable/disable
Initial watchdog timeout period enable/disable
Monitored by the internal 10-bit ADC
Forces PO_ into the active output state when MR = GND
PO_ deassert after MR releases high and the PO_ timeout period expires
PO_ cannot be a function of MR only
Holds PO_ in existing state or asserts PO_ to a programmed output state, independent of changes in
monitored inputs or watchdog timers, when MARGIN = GND
Overrides MR when both assert at the same time
Internal +1.25V reference voltage
Goes high-impedance when internal reference selected
External reference voltage input from +1.225V to +1.275V
Sets ADC voltage range
Monitors IN_, AUXIN1, and AUXIN2
Completes conversion of all eight inputs in 200ms
Reference voltage sets ADC range
Read ADC data from SMBus/I 2 C interface
Locks user EEPROM based on PO_
Locks configuration EEPROM
* ADC does not control programmable outputs.
x = TH
Set the primary and secondary threshold voltages for
each voltage-detector input with registers 00h – 0Bh.
Each primary threshold voltage must be an undervolt-
age threshold. Configure each secondary threshold
V ? 1.25 V
0 . 025 V
for + 1 . 25 V to + 7 . 625 V range
voltage as an undervoltage or overvoltage threshold
(see register 0Ch). Set the threshold range for each
voltage detector with register 0Dh.
High Voltage Input (IN1)
IN1 offers threshold voltages of +2.5V to +13.2V in
50mV increments, or +1.25V to +7.625V in 25mV incre-
ments. Use the following equations to set the threshold
voltages for IN1:
where V TH is the desired threshold voltage and x is the
decimal code for the desired threshold (Table 2). For
the +2.5V to +13.2V range, x must equal 214 or less,
otherwise the threshold exceeds the maximum operat-
ing voltage of IN1.
Bipolar Voltage Input (IN2)
IN2 offers negative thresholds from -2.5V to -15.25V in
50mV increments, or from -1.25V to -7.625V in 25mV
increments. Alternatively, IN2 offers positive thresholds
x = TH
V ? 2.5 V
0 . 05 V
for + 2 . 5 V to + 13 . 2 V range
from +2.5V to +15.25V in 50mV increments, or +1.25V
to +7.625V in 25mV increments. Use the following
equations to set the threshold voltages for IN2:
14
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