MB91460P Series
100
DS07-16615-2E
8.
Data Flash Security
8.1.
Data Flash Security Operation
The data flash security protects the flash against unauthorized read and write access.
A read access to protected flash will return data=0x00 without notification. There is no flag indicating that the
read access was masked by data flash security module.
A write access to a write-protected sector will be cancelled.
The flash macro will be put into RESET state, and the security macro will re-fetch the security information.
It may take up to 600
μs until the data flash can be accessed again.
In direct access mode, the toggle bits will not change and the bit DFCS:RDY will not go to low state.
In command sequencer mode, the flag DFWS:WERINT is set, indicating that the write operation was not
successful.
The only possible write operation to a protected sector is Chip Erase.
The data flash security can be disabled by setting the external pin FSC_DISABLE = 1.
After INIT, please wait 3 ms before accessing the data flash. This time is needed for the security vector fetch
as well as internal signal synchronization. This time is valid also if FSC_DISABLE = 1.
8.1.
Security Vectors
Two 16-bit Data Flash Security Vectors (DFSV1, DFSV2) are located in the 256 byte security sector, controlling
the protection functions of the Data Flash Security module:
DFSV1[15:0]: 0xFFFB:FF00
DFSV2[15:0]: 0xFFFB:FF02
8.2.
Security Vector DFSV1 (bit15 to bit0)
The setting of the Flash Security Vector DFSV1 is responsible for the read and write protection modes.
Explanation of the bits in the Flash Security Vector DFSV1 [15:0]
Vectors
Address
+0+1+2+3
Block
FFFBFF00H
DFSV1[15:0]
DFSV2[15:0]
Data Flash
Security Vectors
DFSV1[15:3]
DFSV1[2]
Write
Protection
Level
DFSV1[1]
Write
Protection
DFSV1[0]
Read
Protection
Flash Security Mode
set all to “0”
set to “0”
set to “1”
Read Protection (all device modes, except INTVEC 1 )
1.
INTVEC mode is the Internal Vector Fetch mode (MD[2:0] = “000”)
set all to “0”
set to “0”
set to “1”
set to “0”
Write Protection (all device modes, without exception)
set all to “0”
set to “0”
set to “1”
Read Protection (all device modes, except INTVEC) and
Write Protection (all device modes, without exception)
set all to “0”
set to “1”
set to “0”
set to “1”
Read Protection (all device modes, except INTVEC)
set all to “0”
set to “1”
set to “0”
Write Protection (all device modes, except INTVEC)
set all to “0”
set to “1”
Read Protection (all device modes, except INTVEC) and
Write Protection (all device modes, except INTVEC)