参数资料
| 型号： | X40420S14I-BT1 |
| 厂商： | Intersil |
| 文件页数： | 8/25页 |
| 文件大小： | 0K |
| 描述： | IC VOLT MON DUAL SUP/SW 14-SOIC |
| 标准包装： | 2,500 |
| 类型： | 多压监控器 |
| 监视电压数目： | 2 |
| 输出： | 开路漏极，开路漏极 |
| 复位： | 高有效/低有效 |
| 复位超时： | 可调节/可选择 |
| 电压 - 阀值： | 2.6V，4.6V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 14-SOIC（0.154"，3.90mm 宽） |
| 供应商设备封装： | 14-SOICN |
| 包装： | 带卷 (TR) |
X40420, X40421
Figure 6. V TRIPX Set/Reset Sequence (X = 1, 2)
V TRIPX Programming
Vx = V CC , VxMON
Note: X = 1, 2
Let: MDE = Maximum Desired Error
No
Desired
V TRIPX <
Present Value
YES
Execute
V TRIPX Reset Sequence
MDE +
Desired Value
MDE –
Acceptable
Error Range
Error = Actual - Desired
Set V X = desired V TRIPX
New V X applied =
Old V X applied + | Error |
NO
Execute
Set Higher V X Sequence
Apply V CC and Voltage
> Desired V TRIPX to V X
Decrease V X
Output Switches?
YES
New V X applied =
Old V X applied - | Error |
Execute Reset V TRIPX
Sequence
Error < MDE –
Actual V TRIPX -
Desired V TRIPX
| Error | < | MDE |
DONE
Error > MDE +
WEL: Write Enable Latch (Volatile)
The WEL bit controls the access to the memory and to
the Register during a write operation. This bit is a vola-
tile latch that powers up in the LOW (disabled) state.
While the WEL bit is LOW, writes to any address,
including any control registers will be ignored (no
acknowledge will be issued after the Data Byte). The
WEL bit is set by writing a “1” to the WEL bit and
zeroes to the other bits of the control register.
8
Once set, WEL remains set until either it is reset to 0
(by writing a “0” to the WEL bit and zeroes to the other
bits of the control register) or until the part powers up
again. Writes to the WEL bit do not cause a high volt-
age write cycle, so the device is ready for the next
operation immediately after the stop condition.
May 25, 2006
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| X40420S14I-AT1 | IC VOLT MON DUAL SUP/SW 14-SOIC |
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