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| 型号： | MC68HC05SU3AFB |
| 厂商： | MOTOROLA INC |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 8-BIT, MROM, 2 MHz, MICROCONTROLLER, PQFP44 |
| 封装： | QFP-44 |
| 文件页数： | 18/80页 |
| 文件大小： | 328K |
| 代理商： | MC68HC05SU3AFB |
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MC68HC05SU3A
MOTOROLA
3-1
INPUT/OUTPUT PORTS
3
INPUT/OUTPUT PORTS
The MC68HC05SU3A has 32 bidirectional I/O lines, arranged as four 8-bit I/O ports (Port A, B, C,
and D). The individual bits in these ports are programmable as either inputs or outputs under
software control by the Data Direction Registers (DDRs). All port pins (except PB0 and PB1) each
has an associated 20K
pull-up resistor, which can be connected/disconnected under software
control. Also, each port pin (except PB0 and PB1) is capable of sinking and driving a maximum
current of 10mA (e.g. direct drive for LEDs). PB0 and PB1 each has a permanent 1.9K
pull-up
resistor connected, with 20mA current sink capability. Port A can also be congured for keyboard
interrupts.
3.1
Parallel Ports
Port A, B, C, and D are 8-bit bidirectional ports. Each Port pin is controlled by the corresponding
bits in a Data Direction Register and a Data Register as shown in Figure 3-1. The functions of the
I/O pins are summarized in Table 3-1.
3.1.1
Port Data Registers
Each Port I/O pin has a corresponding bit in the Port Data Register. When a Port I/O pin is
programmed as an output the state of the corresponding data register bit determines the state of
the output pin. All Port I/O pins can drive a current of 10mA when programmed as outputs. When
a Port pin is programmed as an input, any read of the Port Data Register will return the logic state
of the corresponding I/O pin. The locations of the Data Registers for Port A, B, C, and D are at
$00, $01, $02, and $03 respectively. The Port Data Registers are unaffected by reset.
Table 3-1 I/O Pin Functions
R/W
DDR
I/O Pin Function
0
The I/O pin is in input mode. Data is written into the output data latch.
0
1
Data is written into the output data latch and output to the I/O pin.
1
0
The state of the I/O pin is read.
1
The I/O pin is in an output mode. The output data latch is read.
TPG
23
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