参数资料
型号: MCM6706ARJ7R2
厂商: MOTOROLA INC
元件分类: SRAM
英文描述: 32K x 8 Bit Static Random Access Memory
中文描述: 32K X 8 STANDARD SRAM, 7 ns, PDSO32
封装: 0.300 INCH, SOJ-32
文件页数: 6/8页
文件大小: 151K
代理商: MCM6706ARJ7R2
MCM6706R
6
MOTOROLA FAST SRAM
WRITE CYCLE 2
(E Controlled, See Notes 1 and 2)
MCM6706R–6
MCM6706R–7
MCM6706R–8
Parameter
Symbol
Min
Max
Min
Max
Min
Max
Unit
Notes
Write Cycle Time
tAVAV
tAVEL
tAVEH
tELWH,
tELEH
6
7
8
ns
3
Address Setup Time
0
0
0
ns
Address Valid to End of Write
6
7
8
ns
Chip Enable to End of Write
5
6
7
ns
4,5
Data Valid to End of Write
tDVEH
tEHDX
tEHAX
3
3.5
4
ns
Data Hold Time
0
0
0
ns
Write Recovery Time
0
0
0
ns
NOTES:
1. A write occurs during the overlap of E low and W low.
2. Product sensitivites to noise require proper grounding and decoupling of power supplies as well as minimization or elimination of bus
contention conditions during read and write cycles.
3. All write cycle timing is referenced from the last valid address to the first transitioning address.
4. If E goes low coincident with or after W goes low, the output will remain in a high impedance condition.
5. If E goes high coincident with or before W goes high, the output will remain in a high impedance condition.
WRITE CYCLE 2
W (WRITE ENABLE)
Q (DATA OUT)
D (DATA IN)
E (CHIP ENABLE)
A (ADDRESS)
HIGH–Z
tAVAV
DATA VALID
tEHDX
tDVEH
tEHAX
tELWH
tAVEH
tAVEL
tELEH
ORDERING INFORMATION
(Order by Full Part Number)
Motorola Memory Prefix
Part Number
Package (J = 300 mil SOJ)
Full Part Numbers — MCM6706J6
MCM6706RJ7
MCM6706RJ7R2
MCM6706RJ8
MCM6706RJ8R2
MCM6706RJ6R2
Shipping Method (R2 = Tape and Reel, Blank = Rails)
Speed (6 = 6 ns, 7 = 7 ns, 8 = 8 ns)
MCM
6706R
X
XX
XX
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