ML66525 Family User’s Manual
Chapter 17 USB Control Function
17 - 4
17.3.4
Operation of Control Transfer
(a) Setup stage
The setup token and 8 bytes of setup data are transmitted from the host. USB controller
decodes the setup token, and automatically stores the 8 bytes of setup data in the setup
register. When this is completed normally, USB controller returns ACK to the host. The
8-byte setup data is the standard request code defined in Section 9.3 of the USB Standards,
or a code of the requests unique to each device class, etc. The request is decoded on CPU
side.
(b) Data stage
If the request specified by the 8-byte setup data is also accompanied by transfer of
parameter data from the host to the device, the transfer is a control write transfer, and the
OUT token and the data packet are transmitted from the host. When these are received
normally, USB controller stores the parameter data in the EP0 receive FIFO and returns
ACK to the host.
If the request is accompanied by transfer of parameter data from the device to the host, the
transfer is a control read transfer, and when the host sends the IN token, USB controller
sends the parameter data that was already stored beforehand in the EP0 transmit FIFO by
CPU. When the host receives this normally, it returns an ACK to USB controller. On the
other hand, in the case of requests that do not contain any parameter data that needs to be
transmitted or received, this data stage will not be present and the processing proceeds
directly to the status stage from the setup stage.
(c) Status stage
The status stage is a stage intended for reporting the status of the result of executing a
request from the device to the host. During a control write transfer or a control transfer
without data, the IN token is sent by the host, and USB controller returns a response to it.
During a control read transfer, the OUT token and data of zero length are sent by the host,
and USB controller returns a response to it.
During the above control transfers, CPU need only read from or write to the 8-byte setup
registers mapped at 00h to 07h, the EP0 transmit FIFO mapped at 70h, and the EP0 receive FIFO
mapped at 78h according to the interrupt cause, and all other operations will be carried out
automatically by USB controller.