参数资料
型号: MPC5200CVR266
厂商: Freescale Semiconductor
文件页数: 10/80页
文件大小: 0K
描述: IC MPU 32BIT 266MHZ PPC 272-PBGA
标准包装: 40
系列: MPC52xx
核心处理器: 603e G2 LE
芯体尺寸: 32-位
速度: 266MHz
连通性: CAN,EBI/EMI,以太网,I²C,IrDA,J1850,SPI,UART/USART,USB
外围设备: AC'97,DMA,I²S,POR,PWM,WDT
输入/输出数: 56
程序存储器类型: 外部程序存储器
RAM 容量: 16K x 8
电压 - 电源 (Vcc/Vdd): 1.42 V ~ 1.58 V
振荡器型: 内部
工作温度: -40°C ~ 85°C
封装/外壳: 272-BBGA
包装: 托盘
MPC5200 Data Sheet, Rev. 4
Electrical and Thermal Characteristics
Freescale Semiconductor
18
NOTE
Beware of changing the values on the pins of the reset configuration word
after the deassertion of PORRESET. This may cause problems because it
may change the internal clock ratios and so extend the PLL locking process.
3.3.4
External Interrupts
The MPC5200 provides three different kinds of external interrupts:
Four IRQ interrupts
Eight GPIO interrupts with simple interrupt capability (not available in power-down mode)
Eight WakeUp interrupts (special GPIO pins)
The propagation of these three kinds of interrupts to the core is shown in the following graphic:
Figure 4. External interrupt scheme
Due to synchronization, prioritization, and mapping of external interrupt sources, the propagation of
external interrupts to the core processor is delayed by several IP_CLK clock cycles. The following table
specifies the interrupt latencies in IP_CLK cycles. The IP_CLK frequency is programmable in the Clock
Distribution Module (see Note Table 16).
Table 16. External interrupt latencies
Interrupt Type
Pin Name
Clock Cycles
Reference Clock
Core Interrupt
SpecID
Interrupt Requests
IRQ0
10
IP_CLK
critical (cint)
A4.1
IRQ0
10
IP_CLK
normal (int)
A4.2
IRQ1
10
IP_CLK
normal (int)
A4.3
IRQ2
10
IP_CLK
normal (int)
A4.5
IRQ3
10
IP_CLK
normal (int)
A4.6
8 GPIOs
GPIO WakeUp
GPIO Std
IRQ0
IRQ1
IRQ2
IRQ3
PIs
cint
int
Grouper
Encoder
Main Interrupt
Controller
core_cint
core_int
G2_LE Core
Notes:
1. PIs = Programmable Inputs
2. Grouper and Encoder functions imply programmability in software
8
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