参数资料
型号: NCV8702SN28T1G
厂商: ON Semiconductor
文件页数: 17/20页
文件大小: 0K
描述: IC REG LDO 2.8V .2A SOT23-5
标准包装: 3,000
稳压器拓扑结构: 正,固定式
输出电压: 2.8V
输入电压: 最高 5.5V
电压 - 压降(标准): 0.14V @ 200mA
稳压器数量: 1
电流 - 输出: 200mA
电流 - 限制(最小): 220mA
工作温度: -40°C ~ 125°C
安装类型: 表面贴装
封装/外壳: 6-TSSOP(5 引线),SC-88A,SOT-353
供应商设备封装: 5-TSOP
包装: 带卷 (TR)
NCV8702
400
350
0.8
0.7
300
250
200
150
100
P D(MAX) , T A = 25 ? C, 2 OZ CU
P D(MAX) , T A = 25 ? C, 1 OZ CU
q JA , 1 OZ CU
q JA , 2 OZ CU
0.6
0.5
0.4
0.3
0.2
50
0
100
200
300
400
500
600
700
0.1
800
PCB COPPER AREA (mm 2 )
Figure 63. q JA and P D(MAX) vs. Copper Area (XDFN6)
Load Regulation
The NCV8702 features very good load regulation of
maximum 2.6 mV in the 0 mA to 200 mA range. In order to
achieve this very good load regulation a special attention to
PCB design is necessary. The trace resistance from the OUT
pin to the point of load can easily approach 100 m ? which
will cause a 20 mV voltage drop at full load current,
deteriorating the excellent load regulation.
400
360
320
280
240
200
160
V OUT = 3.3 V
V OUT = 0.8 V
V OUT = 1.8 V
Line Regulation
The IC features very good line regulation of 0.44 mV/V
measured from V IN = V OUT + 0.3 V to 5.5 V. For battery
operated applications it may be important that the line
regulation from V IN = V OUT + 0.3 V up to 4.5 V is only
0.29 mV/V.
120
80
40
0
? 40
V IN = V OUT + 0.3 V or 2 V
I OUT = 10 mA
C IN = C OUT = 1 m F
V EN = 0 V ? > 0.9 V
? 20 0 20 40 60 80 100 120 140
T J , JUNCTION TEMPERATURE ( ? C)
Power Supply Rejection Ratio
The NCV8702 features very good Power Supply
Rejection ratio. If desired the PSRR at higher frequencies in
the range 100 kHz – 10 MHz can be tuned by the selection
of C OUT capacitor and proper PCB layout.
Output Noise
The IC is designed for ultra ? low noise output voltage.
Figures 3 – 8 illustrate the noise performance for different
V OUT , I OUT , C OUT . Generally the noise performance in the
indicated frequency range improves with increasing output
current, although even at I OUT = 1 mA the noise levels are
below 22 m V RMS .
Turn ? On Time
The turn ? on time is defined as the time period from EN
assertion to the point in which V OUT will reach 98% of its
nominal value. This time is dependent on V OUT(NOM) ,
C OUT , T A . The turn ? on time temperature dependence is
shown below:
Figure 64. Turn ? On Time vs. Temperature
Internal Soft-Start
The Internal Soft ? Start circuitry will limit the inrush
current during the LDO turn-on phase. Please refer to
Figure 43 for typical inrush current values for given output
capacitance.
The soft ? start function prevents from any output voltage
overshoots and assures monotonic ramp-up of the output
voltage.
PCB Layout Recommendations
To obtain good transient performance and good regulation
characteristics place C IN and C OUT capacitors close to the
device pins and make the PCB traces wide. In order to
minimize the solution size use 0402 capacitors. Larger
copper area connected to the pins will also improve the
device thermal resistance. The actual power dissipation can
be calculated by the formula given in Equation 2.
http://onsemi.com
17
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