Data Sheet
ORCA Series 2 FPGAs
June 1999
108
Lucent Technologies Inc.
AE3
—
PB1B
I/O
AF3
PB1B
PB1C
PB2A
I/O
AE4
PB1C
PB1D
PB2D
I/O
AD4
PB1D
PB2A
PB3A
I/O
AF4
PB2A
PB2D
VDD5
I/O-VDD5
AE5
—
PB2B
PB3A
PB4A
I/O
AC5
PB2B
PB2C
PB3C
PB4C
I/O
AD5
—
PB2D
PB3D
PB4D
I/O
AF5
PB2C
PB3A
PB4A
PB5A
I/O
AE6
PB2D
PB3B
PB4B
PB5B
I/O
AC7
PB3A
PB3C
PB4C
PB5C
I/O
AD6
PB3B
PB3D
PB4D
PB5D
I/O-A17
AF6
—
PB4A
PB5A
PB6A
I/O
AE7
PB3C
PB4B
PB5B
PB6B
I/O
AF7
—
PB4C
PB5C
PB6C
I/O
AD7
PB3D
PB4D
PB5D
PB6D
I/O
AE8
PB4A
PB5A
PB6A
PB7A
I/O
AC9
PB4B
PB5B
PB6B
PB7D
I/O
AF8
PB4C
PB5C
PB6C
PB8A
I/O
AD8
PB4D
PB5D
PB6D
PB8D
I/O
AE9
PB5A
PB6A
PB7A
PB9A
I/O
AF9
PB5B
PB6B
PB7B
PB9D
I/O
AE10
PB5C
PB6C
PB7C
PB10A
I/O
AD9
PB5D
PB6D
PB7D
PB10D
I/O
AF10
PB6A
PB7A
PB8A
PB11A
I/O
AC10
PB6B
PB7B
PB8B
PB8D
PB11D
I/O
AE11
PB6C
PB7C
PB8C
PB9A
PB12A
I/O
AD10
PB6D
PB7D
PB8D
PB9D
PB12D
I/O
AF11
PB7A
PB8A
PB9A
PB10A
PB13A
I/O
AE12
PB7B
PB8B
PB9B
PB10D
PB13D
I/O
AF12
PB7C
PB8C
PB9C
PB11A
PB14A
I/O
AD11
PB7D
PB8D
PB9D
PB11D
PB14D
I/O
AE13
PB8A
PB9A
PB10A
PB12A
PB15A
I/O
AC12
PB8B
PB9B
PB10B
PB12B
PB15B
I/O
AF13
PB8C
PB9C
PB10C
PB12C
PB15C
I/O
AD12
PB8D
PB9D
PB10D
PB12D
PB15D
I/O
AE14
PB9A
PB10A
PB11A
PB13A
PB16A
I/O
AC14
PB9B
PB10B
PB11B
PB13B
PB16B
I/O
AF14
PB9C
PB10C
PB11C
PB13C
PB16C
I/O
Pin Information (continued)
Table 27. OR2C/2T10A, OR2C/2T12A, OR2C/2T15A/B, OR2C/2T26A, and OR2T40A/B 352-Pin PBGA
Pinout (continued)
Pin
2C/2T10A Pad
2C/2T12A Pad
2C/2T15A/B Pad
2C/2T26A Pad OR2T40A/B Pad
Function
Notes:
The pins labeled I/O-VDD5 are user I/Os for the OR2CxxA and OR2TxxB series, but they are connected to VDD5 for the OR2TxxA series.
The pins labeled VSS-ETC are the 6 x 6 array of thermal balls located at the center of the package. The balls can be attached to the ground plane
of the board for enhanced thermal capability (see Table 29), or they can be left unconnected.