- 您现在的位置：买卖IC网 > PDF目录369948 > PC28F256J3C-115 (Intel Corp.) Intel StrataFlash Memory (J3) PDF资料下载
参数资料
| 型号： | PC28F256J3C-115 |
| 厂商： | Intel Corp. |
| 英文描述： | Intel StrataFlash Memory (J3) |
| 中文描述： | 英特尔StrataFlash存储器（J3） |
| 文件页数： | 42/72页 |
| 文件大小： | 905K |
| 代理商： | PC28F256J3C-115 |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页第33页第34页第35页第36页第37页第38页第39页第40页第41页当前第42页第43页第44页第45页第46页第47页第48页第49页第50页第51页第52页第53页第54页第55页第56页第57页第58页第59页第60页第61页第62页第63页第64页第65页第66页第67页第68页第69页第70页第71页第72页
256-Mbit J3 (x8/x16)
42
Datasheet
11.0
Programming Operations
The device supports two different programming methods: word programming, and write-buffer
programming. Successful programming requires the addressed block to be unlocked. An attempt to
program a locked block will result in the operation aborting, and SR.1 and SR.4 being set,
indicating a programming error. The following sections describe device programming in detail.
11.1
Byte/Word Program
Byte/Word program is executed by a two-cycle command sequence. Byte/Word program setup
(standard 0x40 or alternate 0x10) is written followed by a second write that specifies the address
and data (latched on the rising edge of WE#). The WSM then takes over, controlling the program
and program verify algorithms internally. After the program sequence is written, the device
automatically outputs SRD when read (see
Figure 20, “Byte/Word Program Flowchart” on
page 61
). The CPU can detect the completion of the program event by analyzing the STS signal or
SR.7.
When program is complete, SR.4 should be checked. If a program error is detected, the Status
Register should be cleared. The internal WSM verify only detects errors for “1”s that do not
successfully program to “0”s. The CUI remains in Read Status Register mode until it receives
another command.
Reliable byte/word programming can only occur when V
CC
and V
PEN
are valid. If a byte/word
program is attempted while V
PEN
≤
V
PENLK
, SR.4 and SR.3 will be set. Successful byte/word
programs require that the corresponding block lock-bit be cleared. If a byte/word program is
attempted when the corresponding block lock-bit is set, SR.1 and SR.4 will be set.
11.2
Write to Buffer
To program the flash device, a Write to Buffer command sequence is initiated. A variable number
of bytes, up to the buffer size, can be loaded into the buffer and written to the flash device. First, the
Write to Buffer Setup command is issued along with the Block Address (see
Figure 18, “Write to
Buffer Flowchart” on page 59
). At this point, the eXtended Status Register (XSR, see
Table 19
)
information is loaded and XSR.7 reverts to “buffer available” status. If XSR.7 = 0, the write buffer
is not available. To retry, continue monitoring XSR.7 by issuing the Write to Buffer setup
command with the Block Address until XSR.7 = 1. When XSR.7 transitions to a “1,” the buffer is
ready for loading.
Next, a word/byte count is given to the part with the Block Address. On the next write, a device
start address is given along with the write buffer data. Subsequent writes provide additional device
addresses and data, depending on the count. All subsequent addresses must lie within the start
address plus the count.
Internally, this device programs many flash cells in parallel. Because of this parallel programming,
maximum programming performance and lower power are obtained by aligning the start address at
the beginning of a write buffer boundary (i.e., A[4:0] of the start address = 0).
相关PDF资料 |
PDF描述 |
|---|---|
| PC28F128J3C-115 | Intel StrataFlash Memory (J3) |
| PC28F640J3C-115 | Intel StrataFlash Memory (J3) |
| PC28F320J3C-115 | Intel StrataFlash Memory (J3) |
| PC28F128J3C-120 | Intel StrataFlash Memory (J3) |
| PC28F128J3C-125 | Intel StrataFlash Memory (J3) |
相关代理商/技术参数 |
参数描述 |
|---|---|
| PC28F256J3C-120 | 制造商:INTEL 制造商全称:Intel Corporation 功能描述:Intel StrataFlash Memory (J3) |
| PC28F256J3C125 | 制造商:INTEL 制造商全称:Intel Corporation 功能描述:Intel StrataFlash?? Memory |
| PC28F256J3C-125 | 制造商:INTEL 制造商全称:Intel Corporation 功能描述:Intel StrataFlash Memory (J3) |
| PC28F256J3C125 S B93 | 制造商:Intel 功能描述: |
| PC28F256J3C-150 | 制造商:INTEL 制造商全称:Intel Corporation 功能描述:Intel StrataFlash Memory (J3) |
发布紧急采购，3分钟左右您将得到回复。