参数资料
型号: PCM1792DBR
厂商: Texas Instruments
文件页数: 15/61页
文件大小: 0K
描述: IC DAC 24BIT STER 192KHZ 28-SSOP
产品培训模块: Data Converter Basics
标准包装: 2,000
位数: 24
数据接口: I²C,串行,SPI?
转换器数目: 2
电压电源: 模拟和数字
工作温度: -25°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 28-SSOP(0.209",5.30mm 宽)
供应商设备封装: 28-SSOP
包装: 带卷 (TR)
输出数目和类型: 2 电压,单极
采样率(每秒): 200k
PCM1792
SLES069B MARCH 2003 REVISED NOVEMBER 2006
www.ti.com
22
I2C Interface
The PCM1792 supports the I2C serial bus and the data transmission protocol for standard and fast mode as a slave
device. This protocol is explained in I2C specification 2.0.
In I2C mode, the control terminals are changed as follows.
TERMINAL NAME
TDMCA NAME
PROPERTY
DESCRIPTION
MS
ADR0
Input
I2C address 0
MDI
ADR1
Input
I2C address 1
MC
SCL
Input
I2C clock
MDO
SDA
Input/output
I2C data
Slave Address
MSB
LSB
1
0
1
ADR1
ADR0
R/W
The PCM1792 has 7 bits for its own slave address. The first five bits (MSBs) of the slave address are factory preset
to 10011. The next two bits of the address byte are the device select bits which can be user-defined by the ADR1
and ADR0 terminals. A maximum of four PCM1792s can be connected on the same bus at one time. Each PCM1792
responds when it receives its own slave address.
Packet Protocol
A master device must control packet protocol, which consists of start condition, slave address, read/write bit, data
if write or acknowledge if read, and stop condition. The PCM1792 supports only slave receivers and slave
transmitters.
9
SDA
SCL
St
Start
17
8
18
9
18
9
Sp
Stop
Slave Address
ACK
DATA
ACK
DATA
ACK
Condition
R/W
Read Operation
Transmitter
M
S
M
S
M
Data Type
St
Slave Address
R
ACK
DATA
ACK
DATA
ACK
NACK
Sp
Write Operation
Transmitter
M
S
M
S
M
S
M
Data Type
St
Slave Address
W
ACK
DATA
ACK
DATA
ACK
Sp
R/W:
Read Operation if 1; Otherwise, Write Operation
DATA: 8 Bits (Byte)
ACK: Acknowledgement of a Byte if 0
NACK:Not Acknowledgement if 1
M: Master Device
S: Slave Device
St: Start Condition
Sp: Stop Condition
W: Write
R: Read
Figure 32. Basic I2C Framework
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