参数资料
| 型号： | MAX809SN232T1 |
| 厂商： | ON Semiconductor |
| 文件页数： | 9/13页 |
| 文件大小： | 0K |
| 描述： | IC MPU SUPERVISORY 2.32V SOT23 |
| 产品变化通告： | LTB Notification 03/Jan/2008 |
| 标准包装： | 3,000 |
| 类型： | 简单复位/加电复位 |
| 监视电压数目： | 1 |
| 输出： | 推挽式，图腾柱 |
| 复位： | 低有效 |
| 复位超时： | 最小为 140 ms |
| 电压 - 阀值： | 2.32V |
| 工作温度： | -40°C ~ 105°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | TO-236-3，SC-59，SOT-23-3 |
| 供应商设备封装： | SOT-23-3（TO-236） |
| 包装： | 带卷 (TR) |
| 其它名称： | MAX809SN232T1OS |
MAX809 Series, MAX810 Series
APPLICATIONS INFORMATION
V CC Transient Rejection
The MAX809 provides accurate V CC monitoring and
reset timing during power ? up, power ? down, and
brownout/sag conditions, and rejects negative ? going
transients (glitches) on the power supply line. Figure 16
shows the maximum transient duration vs. maximum
negative excursion (overdrive) for glitch rejection. Any
combination of duration and overdrive which lies under the
curve will not generate a reset signal. Combinations above
the curve are detected as a brownout or power ? down.
Typically, transient that goes 100 mV below the reset
threshold and lasts 5.0 m s or less will not cause a reset pulse.
Transient immunity can be improved by adding a capacitor
in close proximity to the V CC pin of the MAX809.
maintained valid to V CC = 0 V, a pull ? down resistor must be
connected from RESET to ground to discharge stray
capacitances and hold the output low (Figure 17). This
resistor value, though not critical, should be chosen such that
it does not appreciably load RESET under normal operation
(100 k W will be suitable for most applications).
V CC
V CC
MAX809/810
RESET
RESET
V CC
GND
R1
100 k
V TH
Overdrive
Figure 17. Ensuring RESET Valid to V CC = 0 V
300
250
Duration
Processors With Bidirectional I/O Pins
Some Microprocessor ’s have bidirectional reset pins.
Depending on the current drive capability of the processor
pin, an indeterminate logic level may result if there is a logic
conflict. This can be avoided by adding a 4.7 k W resistor in
series with the output of the MAX809 (Figure 18). If there
200
150
100
V TH = 4.9 V
V TH = 2.93 V
are other components in the system which require a reset
signal, they should be buffered so as not to load the reset line.
If the other components are required to follow the reset I/O
of the Microprocessor, the buffer should be connected as
shown with the solid line.
50
0
10
V TH = 1.2 V
60 110 160 210 260 310
RESET COMPARATOR OVERDRIVE (mV)
360 410
V CC
V CC
BUFFER
V CC
BUFFERED RESET
TO OTHER SYSTEM
COMPONENTS
Figure 16. Maximum Transient Duration vs.
Overdrive for Glitch Rejection at 25 ° C
RESET Signal Integrity During Power ? Down
The MAX809 RESET output is valid to V CC = 1.0 V.
Below this voltage the output becomes an “open circuit” and
MAX809/810
RESET
RESET
GND
4.7 k
Microprocessor
RESET
GND
does not sink current. This means CMOS logic inputs to the
Microprocessor will be floating at an undetermined voltage.
Most digital systems are completely shutdown well above
this voltage. However, in situations where RESET must be
Figure 18. Interfacing to Bidirectional Reset I/O
http://onsemi.com
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