参数资料
| 型号： | LTC3617EUDD#TRPBF |
| 厂商： | Linear Technology |
| 文件页数： | 14/20页 |
| 文件大小： | 0K |
| 描述： | IC REG SYNC 6A BUCK 24QFN |
| 标准包装： | 2,500 |
| 应用： | 转换器，DDR，DDR2，DDR3 |
| 输入电压： | 2.25 V ~ 5.5 V |
| 输出数： | 1 |
| 输出电压： | 可调至 0.5V |
| 工作温度： | -40°C ~ 125°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 24-WFQFN 裸露焊盘 |
| 供应商设备封装： | 24-QFN（3x5） |
| 包装： | 带卷 (TR) |
LTC3617
APPLICATIONS INFORMATION
The first circuit in the Typical Applications section uses
faster compensation to improve step response.
A second, more severe transient is caused by switching
in loads with large (>1μF) supply bypass capacitors. The
discharged bypass capacitors are effectively put in parallel
with C OUT , causing a rapid drop in V OUT . No regulator can
alter its delivery of current quickly enough to prevent this
sudden step change in output voltage if the load switch
resistance is low and it is driven quickly. More output
capacitance may be required depending on the duty cycle
and load step requirements.
Internal Compensation
The LTC3617 provides the option to use a fixed internal
loop compensation network to reduce the required external
component count and design time. The internal loop com-
pensation network can be selected by connecting the ITH
pin to SV IN . However, selecting the internal compensation
might result in an unstable output voltage when tracking
down to 0V.
Shutdown and Soft-Start
The RUN pin provides a means to shut down the LTC3617.
Tying the RUN pin to SGND places the regulator in a low
quiescent current shutdown state (I Q < 1μA).
Pulling the RUN pin high enables the regulator which allows
an internal soft-start to slowly ramp the VTTR pin voltage
at a rate of approximately 850mV/ms. During this start-
up time, the regulator will operate in discontinuous mode
until the VTTR pin voltage exceeds approximately 0.45V.
When RUN is pulled low, the regulator will force the peak
inductor current to discharge to around 0A before shutting
off both power MOSFETs.
Output Power Good
V IN = 3.3V
40μs/DIV
V IN = 3.3V
40μs/DIV
V OUT
50mV/DIV
I L
2A/DIV
V OUT
50mV/DIV
I L
2A/DIV
3617 F04
V OUT = 1.25V
I LOAD = 100mA TO 3A
COMPENSATION FIGURE 1
Figure 4. Load Step Transient with
External Compensation
3617 F05
V OUT = 1.25V
I LOAD = 100mA TO 3A
V ITH = 3.3V
OUTPUT CAPACITOR VALUE FIGURE 1
Figure 5. Load Step Transient with
Internal Compensation
The PGOOD output of the LTC3617 is driven by a 17Ω
(typical) open-drain pull-down MOSFET. This MOSFET
turns off approximately 3ms to 4ms after the beginning
of start-up and once the output voltage is within 5% (typi -
cal) of 0.5 ? VDDQIN, allowing the voltage at PGOOD to
rise via an external pull-up resistor (100k typical). If the
output voltage exits an 8% (typical) regulation window
of 0.5 ? VDDQIN or the VTTR pin is lower than 0.45V, the
open-drain output will pull low, thus dropping the PGOOD
pin voltage. To prevent unwanted PGOOD glitches during
transients or dynamic V OUT changes, the LTC3617 PGOOD
falling edge includes a filter time of approximately 105μs.
Efficiency Considerations
The efficiency of a switching regulator is equal to the output
power divided by the input power times 100%. It is often
useful to analyze individual losses to determine what is
limiting the efficiency and which change would produce
the most improvement. Efficiency can be expressed as:
Efficiency = 100% – (L1 + L2 + L3 + ...)
where L1, L2, etc. are the individual losses as a percent -
age of input power.
3617fa
14
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