参数资料
型号: LTC3617EUDD#TRPBF
厂商: Linear Technology
文件页数: 16/20页
文件大小: 0K
描述: IC REG SYNC 6A BUCK 24QFN
标准包装: 2,500
应用: 转换器,DDR,DDR2,DDR3
输入电压: 2.25 V ~ 5.5 V
输出数: 1
输出电压: 可调至 0.5V
工作温度: -40°C ~ 125°C
安装类型: 表面贴装
封装/外壳: 24-WFQFN 裸露焊盘
供应商设备封装: 24-QFN(3x5)
包装: 带卷 (TR)
LTC3617
APPLICATIONS INFORMATION
I RMS = 6A ?
– 1 ? = 3A RMS
? ?
R T =
3.82 11 Hz
– 16k = 130k ?
L = ?
? ? ? ? ? 1– 2.5V ? ? = 0.12μH
Remembering that the above junction temperature is
obtained from the R DS(ON) at 25°C, we might recalculate
the junction temperature based on a higher R DS(ON) since
it increases with temperature. Redoing the calculation
assuming that R SW increased 15% at 73°C yields a new
junction temperature of 79°C. Therefore, we can safely as -
sume that the actual junction temperature will not exceed
the absolute maximum junction temperature of 125°C.
Note that for very low input voltage, the junction tempera -
ture will be higher due to increased switch resistance,
R DS(ON) . It is not recommended to use full load current
with high ambient temperature and low input voltage.
To maximize the thermal performance of the LTC3617 the
exposed pad must be soldered to a ground plane. See the
PCB Layout Board Checklist.
Design Example
As a design example, consider the LTC3617 in an applica-
tion with the following specifications:
V IN = 2.5V, V OUT = 1.25V, I OUT(MAX) = 6A, I OUT(MIN) =
200mA, f = 2.6MHz.
First, calculate the timing resistor:
2.6MHz
Next, calculate the inductor value for about 33% ripple
current at maximum V IN :
? 1.25V ? ? 1.25V ?
? 2.6MHz ? 2A
Using a standard value of 0.1μH inductor results in a
maximum ripple current of:
C IN should be selected for a maximum current rating of:
1.25V ? 2.5V ?
2.5V ? 1.25V ?
Decoupling PV IN with four 10μF to 22μF capacitors is
adequate for most applications. Connecting the V FB pin
directly to V OUT will set the output voltage equal to one-half
of the voltage on the VDDQIN pin. The complete circuit of
this design example is illustrated in Figure 1.
PC Board Layout Checklist
When laying out the printed circuit board, the following
checklist should be used to ensure proper operation of
the LTC3617:
1. A ground plane is recommended. If a ground plane layer
is not used, the signal and power grounds should be
segregated with all small-signal components returning
to the SGND pin at one point which is then connected
to the PGND pin close to the LTC3617.
2. Connect the (+) terminal of the input capacitor(s), C IN ,
as close as possible to the PV IN pin, and the (–) terminal
as close as possible to the exposed pad, PGND. This
capacitor provides the AC current into the internal power
MOSFETs.
3. Keep the switching node, SW, away from all sensitive
small-signal nodes.
4. Flood all unused areas on all layers with copper. Flood -
ing with copper will reduce the temperature rise of
power components. Connect the copper areas to PGND
(exposed pad) for best performance.
5. Connect the V FB pin directly to V OUT .
? I L = ?
? ? ? ? ? 1– 2.5V ? ? = 2.4A
? 1.25V
? 2.6MHz ? 0.1μH
? ? 1.25V ?
C OUT will be selected based on the ESR that is required
to satisfy the output voltage ripple requirement and the
bulk capacitance needed for loop stability. For this design,
a 100μF ceramic capacitor is used with a X5R or X7R
dielectric.
3617fa
16
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