7 CLOCK GENERATOR (CLG)
7-4
Seiko Epson Corporation
S1C17554/564 TECHNICAL MANUAL
3.1.2 OSC3 Oscillation Stabilization Wait Time Settings
Table 7.
OSC3WT[1:0]
Oscillation stabilization wait time
0x3
128 cycles
0x2
256 cycles
0x1
512 cycles
0x0
1024 cycles
(Default: 0x0)
This is set to 1,024 cycles (OSC3 clock) after an initial reset.
When the system clock is switched to OSC3 immediately after the OSC3 oscillator circuit is turned on, the
OSC3 clock is supplied to the system after the OSC3 clock system supply wait time indicated below (at a maxi-
mum) has elapsed. For the oscillation start time, see the “Electrical Characteristics” chapter.
OSC3 clock system supply wait time
≤ OSC3 oscillation start time (max.) + OSC3 oscillation sta-
bilization wait time
Note: Oscillation stability will vary, depending on the resonator and other external components. Carefully
consider the OSC3 oscillation stabilization wait time before reducing the time.
The OSC3 oscillation stabilization wait circuit can be enabled or disabled using OSC3WCE/CLG_NFEN
register. After an initial reset, the OSC3 oscillation stabilization wait circuit is enabled (OSC3WCE = 1) and
it controls the clock supply to the system. When a stabilized external clock is input to the OSC3 pin, setting
OSC3WCE to 0 enables the system to start operating without a stabilization wait time.
OSC1 Oscillator
7.3.2
The OSC1 oscillator is a high-precision, low-speed oscillator circuit that uses a 32.768 kHz crystal resonator.
The OSC1 clock is generally used as the timer operation clock (for the clock timer, stopwatch timer, watchdog tim-
er, and 16-bit PWM timer). It can be used as the system clock instead of the OSC3 or IOSC clock to reduce power
consumption when no high-speed processing is required.
Figure 7.3.2.1 shows the OSC1 oscillator configuration.
OSC1WCE
VSS
OSC2
OSC1
OSC2
OSC1
Rf1
CD1
CG1
SLEEP status
X'tal1
fOSC1
OSC1EN
Oscillation stabilization
wait circuit
SLEEP status
fOSC1
OSC1EN
Oscillation stabilization
wait circuit
N.C.
VSS
LVDD
External
clock
(1) Crystal oscillator circuit
(2) External clock input
3.2.1 OSC1 Oscillator Circuit
Figure 7.
A crystal resonator (X’tal1) and a feedback resistor (Rf1) should be connected between the OSC1 and OSC2 pins.
Additionally, two capacitors (CG1 and CD1) should be connected between the OSC1/OSC2 pins and VSS.
To use an external clock, leave the OSC2 pin open and input an LVDD-level clock (with a 50% duty cycle) to the
OSC1 pin.
For oscillation characteristics and external clock input characteristics, see the “Electrical Characteristics” chapter.