8 I/O PORTS (P)
S1C17554/564 TECHNICAL MANUAL
Seiko Epson Corporation
8-7
Px Port Input Data Registers (Px_IN)
Register name Address
Bit
Name
Function
Setting
Init. R/W
Remarks
Px Port Input
Data Register
(Px_IN)
0x5200
0x5210
0x5220
0x5230
0x5240
0x5250
(8 bits)
D7–0 PxIN[7:0]
Px[7:0] port input data
1 1 (H)
0 0 (L)
×
R
Note: P0IN[3:0] only are available for the P0 ports. PxIN[5:0] only are available for the P4 and P5 ports.
Other bits are reserved and always read as 0.
D[7:0]
PxIN[7:0]: Px[7:0] Port Input Data Bits
The port pin status can be read out. (Default: external input status)
1 (R):
High level
0 (R):
Low level
PxINy corresponds directly to the Pxy pin. The pin voltage level can be read out when input is enabled
(PxIENy = 1) (even if output is also enabled (PxOENy = 1)). The value read out will be 1 when the pin
voltage is High and 0 when Low.
The value read out is 0 when input is disabled (PxIENy = 0).
Writing operations to the read-only PxINy is disabled.
Px Port Output Data Registers (Px_OUT)
Register name Address
Bit
Name
Function
Setting
Init. R/W
Remarks
Px Port Output
Data Register
(Px_OUT)
0x5201
0x5211
0x5221
0x5231
0x5241
0x5251
(8 bits)
D7–0 PxOUT[7:0] Px[7:0] port output data
1 1 (H)
0 0 (L)
0
R/W
Note: P0OUT[3:0] only are available for the P0 ports. PxOUT[5:0] only are available for the P4 and P5
ports. Other bits are reserved and always read as 0.
D[7:0]
PxOUT[7:0]: Px[7:0] Port Output Data Bits
Sets the data to be output from the port pin.
1 (R/W): High level
0 (R/W): Low level (default)
PxOUTy corresponds directly to the Pxy pins. The data written will be output unchanged from the port
pins when output is enabled (PxOENy = 1). The port pin will be High when the data bit is set to 1 and
Low when set to 0.
Port data can also be written when output is disabled (PxOENy = 0) (the pin status is unaffected).
Px Port Output Enable Registers (Px_OEN)
Register name Address
Bit
Name
Function
Setting
Init. R/W
Remarks
Px Port
Output Enable
Register
(Px_OEN)
0x5202
0x5212
0x5222
0x5232
0x5242
0x5252
(8 bits)
D7–0 PxOEN[7:0] Px[7:0] port output enable
1 Enable
0 Disable
0
R/W
Note: P0OEN[3:0] only are available for the P0 ports. PxOEN[5:0] only are available for the P4 and P5
ports. Other bits are reserved and always read as 0.