15 UART
15-8
Seiko Epson Corporation
S1C17554/564 TECHNICAL MANUAL
UART Interrupts
15.7
The UART includes a function for generating the following four different types of interrupts.
Transmit buffer empty interrupt
End of transmission interrupt
Receive buffer full interrupt
Receive error interrupt
Each UART channel outputs one interrupt signal shared by the four above interrupt causes to the interrupt control-
ler (ITC). Inspect the status flag and error flag to determine the interrupt cause occurred.
Transmit buffer empty interrupt
To use this interrupt, set TIEN/UART_CTLx register to 1. If TIEN is set to 1 while TDBE/UART_STx register
is 1 (transmit data buffer empty) or if TDBE is set to 1 (when the transmit data buffer becomes empty by load-
ing the transmit data written to it to the shift register) while TIEN is 1, an interrupt request is sent to the ITC.
An interrupt occurs if other interrupt conditions are met.
If TIEN is set to 0 (default), interrupt requests for this cause will not be sent to the ITC.
You can inspect the TDBE flag in the UART interrupt handler routine to determine whether the UART interrupt
is attributable to a transmit buffer empty. If TDBE is 1, the next transmit data can be written to the transmit data
buffer by the interrupt handler routine.
End of transmission interrupt
To use this interrupt, set TEIEN/UART_CTLx register to 1. If TEIEN is set to 0 (default), interrupt requests for
this cause will not be sent to the ITC.
When the TRBS flag is reset to 0, the UART sets TRED/UART_STx register to 1, indicating that the transmit
operation has completed. If end of transmission interrupts are enabled (TEIEN = 1), an interrupt request is sent
simultaneously to the ITC.
An interrupt occurs if other interrupt conditions are met. You can inspect the TRED flag in the UART interrupt
handler routine to determine whether the UART interrupt is attributable to an end of transmission. If TRED is 1,
the transmission processing can be terminated.
Receive buffer full interrupt
To use this interrupt, set RIEN/UART_CTLx register to 1. If RIEN is set to 0 (default), interrupt requests for
this cause will not be sent to the ITC.
If the specified volume of received data is loaded into the receive data buffer when a receive buffer full interrupt
is enabled (RIEN = 1), the UART outputs an interrupt request to the ITC. If RBFI/UART_CTLx register is 0,
an interrupt request is output as soon as one received data is loaded into the receive data buffer (when RDRY/
UART_STx register is set to 1). If RBFI is 1, an interrupt request is output as soon as two received data are
loaded into the receive data buffer (when RD2B/UART_STx register is set to 1).
An interrupt occurs if other interrupt conditions are met. You can inspect the RDRY and RD2B flags in the
UART interrupt handler routine to determine whether the UART interrupt is attributable to a receive buffer full.
If RDRY or RD2B is 1, the received data can be read from the receive data buffer by the interrupt handler rou-
tine.
Receive error interrupt
To use this interrupt, set REIEN/UART_CTLx register to 1. If REIEN is set to 0 (default), interrupt requests for
this cause will not be sent to the ITC.
The UART sets an error flag, PER, FER, or OER/UART_STx register to 1 if a parity error, framing error, or
overrun error is detected when receiving data. If receive error interrupts are enabled (REIEN = 1), an interrupt
request is sent simultaneously to the ITC.
If other interrupt conditions are satisfied, an interrupt occurs. You can inspect the PER, FER, and OER flags in
the UART interrupt handler routine to determine whether the UART interrupt was caused by a receive error. If
any of the error flags has the value 1, the interrupt handler routine will proceed with error recovery.
For more information on interrupt processing, see the “Interrupt Controller (ITC)” chapter.