15 UART
15-14
Seiko Epson Corporation
S1C17554/564 TECHNICAL MANUAL
D1
RBFI: Receive Buffer Full Interrupt Condition Setup Bit
Sets the quantity of data in the receive data buffer to generate a receive buffer full interrupt.
1 (R/W): 2 bytes
0 (R/W): 1 byte (default)
If receive buffer full interrupts are enabled (RIEN = 1), the UART outputs an interrupt request to the
ITC when the quantity of received data specified by RBFI is loaded into the receive data buffer.
If RBFI is 0, an interrupt request is output as soon as one received data is loaded into the receive data
buffer (when RDRY/UART_STx register is set to 1). If RBFI is 1, an interrupt request is output as soon
as two received data are loaded into the receive data buffer (when RD2B/UART_STx register is set to 1).
D0
RXEN: UART Enable Bit
Enables data transfer by the UART.
1 (R/W): Enabled
0 (R/W): Disabled (default)
Set RXEN to 1 before starting UART transfers.
Setting RXEN to 0 disables data transfers. The data being transferred cannot be guaranteed if RXEN
is set to 0 while data is being sent or received. Before setting RXEN to 0, check the data transfer sta-
tus with software in consideration of the communication procedure. The data transmit status can be
checked using the TRBS flag.
The transfer conditions must be set while RXEN is 0.
Disabling transfers by writing 0 to RXEN also clears transmit data buffers.
UART Ch.x Expansion Registers (UART_EXPx)
Register name Address
Bit
Name
Function
Setting
Init. R/W
Remarks
UART Ch.x
Expansion
Register
(UART_EXPx)
0x4105
0x4125
(8 bits)
D7–1 –
reserved
–
0 when being read.
D0
IRMD
IrDA mode select
1 On
0 Off
0
R/W
D[7:1]
Reserved
D0
IRMD: IrDA Mode Select Bit
Switches the IrDA interface function on and off.
1 (R/W): On
0 (R/W): Off (default)
Set IRMD to 1 to use the IrDA interface. When IRMD is set to 0, this module functions as a normal
UART, with no IrDA functions.
UART Ch.x Baud Rate Registers (UART_BRx)
Register name Address
Bit
Name
Function
Setting
Init. R/W
Remarks
UART Ch.x
Baud Rate
Register
(UART_BRx)
0x4106
0x4126
(8 bits)
D7–0 BR[7:0]
Baud rate setting
0x0 to 0xff
0x0 R/W
D[7:0]
BR[7:0]: Baud Rate Setting Bits
Sets the initial counter value of the baud rate generator. (Default: 0x0)
The counter in the baud rate generator repeats counting from the value set in this register to occurrence
of counter underflow to generate the transfer (sampling) clock.
Use the following equations to calculate the initial counter value for obtaining the desired transfer rate.
ct_clk
bps = ——————————
{(BR + 1)
× 16 + FMD}
ct_clk
BR =
(——— - FMD - 16) ÷ 16
bps